ACTEL PQ160 Search Results

Actel a1280

Abstract: VKS FPGA CQFP 106 wd5080 74 series family A1280 A32200DX-RQ208 Actel A1225 A1225XL A1240XL A1280XL
Contextual Info: v3.0 Integrator Series FPGAs: 1200XL and 3200DX Families Fe a t ur es G en er al D e sc r i p t i on High C apaci t y Actel’s Integrator Series FPGAs are the first programmable logic devices optimized for high-speed system logic integration. Based on Actel’s proprietary antifuse

A40MX02

Abstract: A42MX16 40MX 42MX A40MX04 A42MX09 A42MX24 A42MX36 a42mx09pq100 vq80
Contextual Info: Preliminary Data Sheet Integrator Series FPGAs – 40MX and 42MX Families Features • Supported by Actel Designer Series development system with interfaces to popular design environments such as Cadence, Exemplar, IST, Mentor Graphics, Synopsys, Synplicity, and Viewlogic

transistor power mx 614

Abstract: 40MX 42MX A40MX02 A40MX04 A42MX09 A42MX16 A42MX24 A42MX36 hp 2800 diode
Contextual Info: Preliminary Data Sheet Integrator Series FPGAs – 40MX and 42MX Families Features • Supported by Actel Designer Series development system with interfaces to popular design environments such as Cadence, Exemplar, IST, Mentor Graphics, Synopsys, Synplicity, and Viewlogic

A42MX16

Abstract: 40MX 42MX A40MX02 A40MX04 A42MX09 A42MX24 A42MX36 transistor C 639 W
Contextual Info: Preliminary Data Sheet Rev. 1 Integrator Series FPGAs: 40MX and 42MX Families Features • Deterministic, User-Controllable Timing Via DirectTime Software Tools. • MX Diagnostics and Debug Supported by Silicon Explorer. • Supported by Actel Designer Series Development System

ACTEL PQ160

Abstract: PQ160 PQG160 C149
Contextual Info: THE DRAWINGS AND INFORMATION CONTAINED HEREIN ARE THE EXCLUSIVE PROPERTY OF ACTEL. THE INFORMATION, DRAWINGS AND DESIGN CONCEPTS CONTAINED HEREIN ARE CONFIDENTIAL/PROPRIETARY, SHALL BE MAINTAINED IN STRICT CONFIDENCE, AND SHALL NOT BE RELEASED TO ANY THIRD PARTY WITHOUT THE EXPRESS

13001 s

Abstract: 13001 datasheet 13001 JL-01 ACTEL 1020B RTSX32 B 13001 RTSX16 42MX09 1280A
Contextual Info: Actel 4th Quarter 2000 Reliability Report 1 Table of Contents Page Reliability Test Matrix • Test Methods and Conditions Failure Rates • Failure Rates FITs Based For Current Process Data • Mean Time Between Failure (MTBF) For Current Process Data 2

PMX32

Abstract: pqfp 3.2mm footprint a54sx72a
Contextual Info: Actel FPGA Selector Guide System Gates Typical Gates Logic Modules Dedicated FlipFlops Max FlipsFlops SRAM Bits Max I/O Available 2.5V CMOS Drive 3.3V CMOS Drive 5V CMOS Drive 5V Tolerant Inputs 3.3V PCI I/O 5V PCI I/O Slew Rate Control Routed Clocks HardWired

ACEQ100

Abstract: actel flashpro3 schematic actel a40mx02 actel EX128 TQ100 Actel A40MX04 FlashPro3 FG144 engine control module arm7 embedded c programming examples FG256
Contextual Info: Automotive Solutions FROM CONCEPT TO PRODUCTION Key Features Actel, the world’s leading supplier of high-reliability FPGAs, now offers the — Nonvolatile, High-Reliability industry’s broadest automotive product portfolio that addresses the unique needs of vehicle designers. FPGAs are being used today in under-the-hood

A1020A

Abstract: ACTEL A1010A Actel a1280 PG176 actel a1240 A1240XL PQ160 Actel A1225 Actel a1225xl
Contextual Info: Appl i cat i o n N ot e Board Level Considerations for Actel FPGAs Introduction Simulating and debugging individual components is the first step towards verifying a system design. In some cases, the devices no longer behave as expected after they are integrated. Many factors, such as power, airflow, and

Actel a1280

Abstract: 240 pin rqfp drawing A1280 VKS FPGA CQFP 106 Actel A1225 172 pin leaded A1225XL CQ84 A1240XL A1280XL
Contextual Info: Discontinued – v3.0 v3.0 Integrator Series FPGAs: 1200XL and 3200DX Families F ea t u re s G e n e ra l D es c ri p t i o n H ig h C a p ac it y Actel’s Integrator Series FPGAs are the first programmable logic devices optimized for high-speed system logic

baugh-wooley multiplier verilog

Abstract: 1BG25 LPQ100 9572xv BC356 LPQ240 block diagram baugh-wooley multiplier 4 BIT ALU design with vhdl code using structural XC3000A actel a1240
Contextual Info: LeonardoSpectrum Synthesis and Technology v1999.1 Copyright Copyright 1991-1999 Exemplar Logic, Inc., A Mentor Graphics Company All Rights Reserved Trademarks Exemplar Logic and its Logo are trademarks of Exemplar Logic, Inc. LeonardoSpectrum™, LeonardoInsight™, FlowTabs™, HdlInventor™, SmartScripts™,

RT54SX72SCQ208

Abstract: A42MX16 RT54SX32S-CQ208 CQ208 CQ256
Contextual Info: v3.0 Component Selector Guide PCI 5.0 Volt Tolerant — 5 Volt I/O — Yes Yes Yes — — Yes 3.3 Volt I/O 3,000 2.5 Volt I/O Gates 36 JTAG I/O User I/O C, I SRAM Bits Screening –F, Std, –P Wide Decodes Speed Grade CS49 Flip-Flops/Dedicated Max Package

Actel A1225

Abstract: PL84 A1240XL actel a1240 A32140 PQ100C Cadence TQ176 PG176
Contextual Info: ^ c te l - w Integrator Series FPGAs: 1200XL and 3200DX Famüies Features a 4 L. ¡§ Cadence, Escalade, Exemplar, 1ST, Mentor Graphics, Synopsvs, and Viewlogic. High C a p a c ity • IEEE Standard 1149.1 JTAG Boundary Scan Testing.

132-PIN CERAMIC PIN GRID ARRAY CPGA

Abstract: A3265DX Actel A1240 WD109 A1225XL A1240XL A1280XL A32100DX A32140DX A32200DX
Contextual Info: Integrator Series FPGAs – 1200XL and 3200DX Familes Features Cadence, Escalade, Exemplar, IST, Mentor Graphics, Synopsys and Viewlogic • JTAG 1149.1 Boundary Scan Testing High Capacity • • • • 2,500 to 40,000 logic gates Up to 4 Kbits configurable dual-port SRAM

A1240XL

Abstract: actel a1240 CQFP 172 PIN A3265DX actel cqfp 84
Contextual Info: BACK Integrator Series FPGAs – 1200XL and 3200DX Familes Features Cadence, Escalade, Exemplar, IST, Mentor Graphics, Synopsys and Viewlogic • JTAG 1149.1 Boundary Scan Testing High Capacity • • • • 2,500 to 40,000 logic gates Up to 4 Kbits configurable dual-port SRAM

actel a1240

Contextual Info: Advanced 3.0 Integrator Series FPGAs: 1200XL and 3200DX Families Fe a t ur es • IEEE Standard 1149.1 JTAG Boundary Scan Testing. High C apaci t y • • • • G en er al D e sc r i p t i on 2,500 to 30,000 Logic Gates Up to 3Kbits Configurable Dual-Port SRAM

A42MX16 datasheet

Abstract: 240 pin rqfp drawing Actel A40MX04 SMD TRANSISTOR w18 A42MX36 smd diode wd v3 5252 F 1009 "integrated circuit" transistor smd w16 a42mx A42MX09
Contextual Info: v 3. 0 40MX and 42MX Families FPGAs Features • QML Certification High Capacity • Ceramic Devices Available to DSCC SMD • • • • • Ease of Integration Single Chip ASIC Alternative 2,000 to 36,000 Available Logic Gates Up to 2.5 Kbits Configurable Dual-Port SRAM

A42MX16

Abstract: ACTEL A42MX09 40MX 42MX A40MX02 A40MX04 A42MX09 A42MX24 A42MX36 CQ256
Contextual Info: v 4 . 0. 1 40MX and 42MX FPGA Families Features • QML Certification High Capacity • Ceramic Devices Available to DSCC SMD • • • • • Ease of Integration Single Chip ASIC Alternative 2,000 to 36,000 Available Logic Gates Up to 2.5 Kbits Configurable Dual-Port SRAM

RA 8040

Abstract: transistor SMD c5c phl 409 64x4 memory SMD cq 603 transistor BIM G18 Y1 smd transistor asy CQ256
Contextual Info: m e te ! v3 .0 - m 40MX and 42MX Families FPGAs F e a tu re s • QML Certification H ig h C a p a c ity • Ceramic Devices Available to DSCC SMD • Single Chip ASIC Alternative E a s e o f In t e g r a tio n • 2,000 to 36,000 Available Logic Gates

Contextual Info: Integrator Series FPGAs - 1200XL and 3200DX Familes Features Cadence, Escalade, Exemplar, 1ST, Mentor Graphics, Synopsys and Viewlogic H ig h C a p a c ity • JTAG 1149.1 Boundary Scan Testing • 2,500 to 40,000 logic gates • Up to 4 Kbits configurable dual-port SRAM

Contextual Info: Integrator Series FPGAs - 1200XL and 3200DX Famüies Features Cadence, Escalade, Exemplar, 1ST, M entor Graphics, Synopsys and Viewlogic High C a p a c ity • JTAG1149.1 Boundary Scan Testing • 2,500 to 40,000 logic gates • Up to 4 Kbits configurable dual-port SRAM

B12C3

Abstract: LA1240
Contextual Info: Integrator Series FPGAs - 1200XL and 3200DX Familes F e a tu re s Cadence, Escalade, Exemplar, 1ST, Mentor Graphics, Synopsys and Viewlogic H ig h C a p a c ity • JTAG 1149.1 Boundary Scan Testing • 2,500 to 40,000 logic gates • Up to 4 Kbits configurable dual-port SRAM

RTM 866 - 480

Abstract: saj 141 OA67 wd 969 ir 40MX04 RTM 866 - 485 kSO 947 262
Contextual Info: 40 Preliminary D ala Sheet -» Revision 1.1 I ntegr ator SeriesFP GAs: 40MX and 42MX Families Features * Deterministic, User-Controllable Timing Via DirectTime Software Tools. High C apacity * MX Diagnostics and Debug Supported by Silicon Explorer. * 2,000 to 52,000 Available Logic Gates

GHL 8

Abstract: FPGA 144 CPGA 172 PLCC ASIC actel a1240 a1280xlf
Contextual Info: Integrator SeriesFPGAs: 1200XL and 3200DX Families Features Cadence, Escalade, E xem plar, 1ST, M e n to r G raphics, Synopsys, and V iew logic. High C a p a c i t y • • 2,500 to 40,000 Logic Gates • Up to 4 K b its C o n fig u ra b le D ual-Port SRAM