42MX Search Results

vq80

Abstract: A40MX02 one time
Contextual Info: Revision 3 40MX and 42MX Automotive FPGA Families Features High Capacity Ease of Integration • Single-Chip Applications ASIC Alternative for Automotive • Up to 100% Resource Utilization and 100% Pin Locking • 3,000 to 54,000 System Gates • Deterministic, User-Controllable Timing

antifuse programming technology

Abstract: 40MX 42MX A40MX02 A40MX04 A42MX09 A42MX16 A42MX24 A42MX36 42MX24
Contextual Info: v6.0 40MX and 42MX FPGA Families Fe a t ur es High C apaci t y • • • • • • Commercial, Military Temperature, and MIL-STD-883 Ceramic Packages Single-Chip ASIC Alternative 3,000 to 54,000 System Gates Up to 2.5 kbits Configurable Dual-Port SRAM

transistor power mx 614

Abstract: 40MX 42MX A40MX02 A40MX04 A42MX09 A42MX16 A42MX24 A42MX36 hp 2800 diode
Contextual Info: Preliminary Data Sheet Integrator Series FPGAs – 40MX and 42MX Families Features • Supported by Actel Designer Series development system with interfaces to popular design environments such as Cadence, Exemplar, IST, Mentor Graphics, Synopsys, Synplicity, and Viewlogic

RA 8040

Abstract: transistor SMD c5c phl 409 64x4 memory SMD cq 603 transistor BIM G18 Y1 smd transistor asy CQ256
Contextual Info: m e te ! v3 .0 - m 40MX and 42MX Families FPGAs F e a tu re s • QML Certification H ig h C a p a c ity • Ceramic Devices Available to DSCC SMD • Single Chip ASIC Alternative E a s e o f In t e g r a tio n • 2,000 to 36,000 Available Logic Gates

RTM 866 - 480

Abstract: saj 141 OA67 wd 969 ir 40MX04 RTM 866 - 485 kSO 947 262
Contextual Info: 40 Preliminary D ala Sheet -» Revision 1.1 I ntegr ator SeriesFP GAs: 40MX and 42MX Families Features * Deterministic, User-Controllable Timing Via DirectTime Software Tools. High C apacity * MX Diagnostics and Debug Supported by Silicon Explorer. * 2,000 to 52,000 Available Logic Gates

64x4-Bit

Contextual Info: v3.0 40MX and 42MX Automotive FPGA Families Features High Capacity Ease of Integration • • • • • • Single-Chip ASIC Alternative for Automotive Applications 3,000 to 54,000 System Gates Up to 2.5 kbits Configurable Dual-Port SRAM Fast Wide-Decode Circuitry

42MX16

Contextual Info: v6 .0 40MX and 42MX FPGA Families Features HiRel Features • High Capacity • • • • • • Commercial, Industrial, Automotive, and Military Temperature Plastic Packages Commercial, Military Temperature, and MIL-STD-883 Ceramic Packages QML Certification

Contextual Info: v4.0 40MX and 42MX FPGA Families Features • QML Certification High Capacity • Ceramic Devices Available to DSCC SMD • • • • • Ease of Integration Single Chip ASIC Alternative 2,000 to 36,000 Available Logic Gates Up to 2.5 Kbits Configurable Dual-Port SRAM

Contextual Info: I ntegrator Series FPGAs: 40MX and 42MX Fami Ii es Single-Chip ASIC Alternative Features • 9 5 -1 0 0 % Resource U tiliz a tio n , Using A u to m a tic Place and R o u te T o o ls w ith up to 100% Pin F ixing. • D e te rm in is tic , U s e r-C o n tro lla b le T im in g Via D ire c tT im e

A42MX24

Abstract: AC297 ACTEL PQ160 CQFP 256 PIN actel A1280XL 42MX ACTEL A1240xl A32140DX PQ208 adb 230 CQ256
Contextual Info: Application Note AC297 Migrating from 1200XL and 3200DX to 42MX FPGAs Overview This application note provides the information needed for seamless migration of a design from the 1200XL and 3200DX families to the 42MX family. The Actel 42MX device architecture is based on the Actel 1200XL and 3200DX families; thus, it shares the

42MX36

Abstract: A42MX16 Actel a42mx16 a42mx A42MX24 AC291 A42MX36 42MX ns845 Actel a42mx16 AC291
Contextual Info: Application Note AC291 42MX Family Devices Power-Up Behavior Introduction Actel antifuse FPGA families offer the advantage of nonvolatility by attaining immediate functionality at power-up. Since the programmed design is retained, there is no requirement for additional configuration

Contextual Info: Æ ic t e ! v 3.0 - m 40MX and 42MX Families FPGAs Features • Q M L C e rtific a tio n High C a p a c ity • C eram ic Devices A va ila b le to DSCCSM D • S ingle C hip A S IC A lte rn a tiv e Ea se of I n t e g r a t i o n

ST 1803 DHL

Abstract: 1103NSL
Contextual Info: Preliminary • Data Sheet Integrator SeriesFPGAs - 40MX and 42MX Families Features • S upported by A ctel Designer Series developm ent system w ith in te rfa c e s to popular design e n viro n m e n ts such as Cadence, E xem plar, 1ST, M e n to r G raphics, Synopsys,

A40MX02

Abstract: A42MX16 40MX 42MX A40MX04 A42MX09 A42MX24 A42MX36 a42mx09pq100 vq80
Contextual Info: Preliminary Data Sheet Integrator Series FPGAs – 40MX and 42MX Families Features • Supported by Actel Designer Series development system with interfaces to popular design environments such as Cadence, Exemplar, IST, Mentor Graphics, Synopsys, Synplicity, and Viewlogic

LATTICE plsi 3000 SERIES cpld

Abstract: EPM9000 TEMIC PLD EPF8000 actel a1240 actel act1 family pLSI2000 A1415-A14100 EPM5000 Actel a1280 pinout
Contextual Info: Device Specific Device Specific Conversion Information Actel FPGA Conversion FPGA Description RAM Actel devices come in seven families for which ULC conversions are supported: ACT1 A1010, A1020 , ACT2 (A1225, A1240 and A1280), ACT3 (A1415-A14100), ACTEL 40MX and 42MX, the

42MX36

Abstract: 42MX24 42MX16 ns845
Contextual Info: Application Note 42MX Family Devices Power-Up Behavior I n tro du ct i on Actel antifuse FPGA families offer the advantage of nonvolatility by attaining immediate functionality at power up. Since the programmed design is retained, there is no requirement for additional configuration devices. This

SM 44P Actel

Abstract: ST 1803 DHL
Contextual Info: Æ ic te ! v 3 .0 - m 40MXand 42MX Families FPGAs Features • Q M L C e rtific a tio n High C a p a c ity • C eram ic Devices A va ila b le to D X C S M D • S ingle C h ip AS IC A lte rn a tiv e Ea se of I n t e g r a t i o n

A42MX16

Abstract: A42MX24 A42MX36 40MX 42MX A40MX02 A40MX04 A42MX09
Contextual Info: v5.0 40MX and 42MX FPGA Families Fe a t ur es High C apaci t y • • • • • • Commercial, Military Temperature and MIL-STD-883 Ceramic Packages Single-Chip ASIC Alternative 3,000 to 54,000 System Gates Up to 2.5 kbits Configurable Dual-Port SRAM Fast Wide-Decode Circuitry

A42MX09

Abstract: A42MX16
Contextual Info: Addendum 40MX and 42MX FPGA Families Actel now offers a ‘–3’ speed grade option for the 42MX09, 42MX16, 42MX24, and 42MX36 devices. This addendum contains only the ‘–3’ speed grade numbers. For ‘–2’, ‘–1’, ‘Std’, and ‘–F’ numbers, please refer to the

Contextual Info: CorePCI Target+DMA Product Summary Version Intended Use This data sheet defines the functionality of Version 2.0 and later macros. • High-Performance Applications PCI Target and DMA Master – 32-Bit, 33 MHz, 5.0V ACT 3, 42MX – 32-Bit, 33 MHz, 3.3V (42MX)

smd transistor 9ab

Abstract: 272-pin BGA drawing A40MX04 A42MX16 Actel A40MX04 40MX 42MX A40MX02 A42MX09 A42MX24
Contextual Info: v6.1 40MX and 42MX FPGA Families Features HiRel Features • High Capacity • • • • • • Single-Chip ASIC Alternative 3,000 to 54,000 System Gates Up to 2.5 kbits Configurable Dual-Port SRAM Fast Wide-Decode Circuitry Up to 202 User-Programmable I/O Pins

smd transistor device marking p18

Abstract: 25 smd fuse marking code 25NSG vq80 42mx16 CQ208 A42MX36 marking
Contextual Info: Revision 11 40MX and 42MX FPGA Families Features HiRel Features High Capacity • Commercial, Industrial, Automotive, Temperature Plastic Packages • Commercial, Military Temperature, and MIL-STD-883 Ceramic Packages • Single-Chip ASIC Alternative • 3,000 to 54,000 System Gates

A42MX16 datasheet

Abstract: 240 pin rqfp drawing Actel A40MX04 SMD TRANSISTOR w18 A42MX36 smd diode wd v3 5252 F 1009 "integrated circuit" transistor smd w16 a42mx A42MX09
Contextual Info: v 3. 0 40MX and 42MX Families FPGAs Features • QML Certification High Capacity • Ceramic Devices Available to DSCC SMD • • • • • Ease of Integration Single Chip ASIC Alternative 2,000 to 36,000 Available Logic Gates Up to 2.5 Kbits Configurable Dual-Port SRAM

272-pin BGA drawing

Abstract: Actel A42MX09 40MX Silicon Sculptor II A42MX09 transistor smd code 42MX09 Actel A40MX04 smd diode wd v3 SMD TRANSISTOR w18
Contextual Info: v6.0 40MX and 42MX FPGA Families Features HiRel Features • High Capacity • • • • • • Single-Chip ASIC Alternative 3,000 to 54,000 System Gates Up to 2.5 kbits Configurable Dual-Port SRAM Fast Wide-Decode Circuitry Up to 202 User-Programmable I/O Pins