LVEL32 Search Results

KV32

Abstract: KVL32 MC100LVEL32
Contextual Info: LVEL32 3.3V ECL ÷2 Divider Description The LVEL32 is an integrated ÷2 divider. The LVEL32 is functionally identical to the EL32, but operates from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the

KVL32

Abstract: MC100LVEL32 MC100LVEL32D ecl divider
Contextual Info: LVEL32 3.3V ECL ÷2 Divider The LVEL32 is an integrated ÷2 divider. The LVEL32 is functionally identical to the EL32, but operates from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the

kvl32

Abstract: transistor BD 540 MC100LVEL32 MC100LVEL32D
Contextual Info: LVEL32 3.3VĄECL ÷2 Divider The LVEL32 is an integrated ÷2 divider. The LVEL32 is functionally identical to the EL32, but operates from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the

Contextual Info: LVEL32 3.3V ECL ÷2 Divider Description The LVEL32 is an integrated ÷2 divider. The LVEL32 is functionally identical to the EL32, but operates from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the

Contextual Info: LVEL32 3.3V ECL ÷2 Divider Description The LVEL32 is an integrated ÷2 divider. The LVEL32 is functionally identical to the EL32, but operates from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the

Contextual Info: LVEL32 3.3V ECL ÷2 Divider The LVEL32 is an integrated ÷2 divider. The LVEL32 is functionally identical to the EL32, but operates from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the

KVL32

Abstract: MC100LVEL32 kv32
Contextual Info: LVEL32 3.3V ECL ÷2 Divider Description The LVEL32 is an integrated ÷2 divider. The LVEL32 is functionally identical to the EL32, but operates from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the

KVL32

Abstract: MC100LVEL32
Contextual Info: LVEL32 3.3V ECL ÷2 Divider Description The LVEL32 is an integrated ÷2 divider. The LVEL32 is functionally identical to the EL32, but operates from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the

transistor BD 540

Abstract: KVL32 KV32 MC100LVEL32 MC100LVEL32D
Contextual Info: LVEL32 3.3VĄECL ÷2 Divider The LVEL32 is an integrated ÷2 divider. The LVEL32 is functionally identical to the EL32, but operates from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the

KVL32

Abstract: MC100LVEL32 MC100LVEL32D
Contextual Info: LVEL32 3.3V ECL ÷2 Divider The LVEL32 is an integrated ÷2 divider. The LVEL32 is functionally identical to the EL32, but operates from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the

KVL32

Abstract: MC100LVEL32
Contextual Info: LVEL32 3.3V ECL ÷2 Divider The LVEL32 is an integrated ÷2 divider. The LVEL32 is functionally identical to the EL32, but operates from a 3.3 V supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random state; the

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA P roduct Preview LVEL32 ^-2 Divider The LVEL32 is an integrated +2 divider. The differential clock inputs and the V b b allow a differential, single-ended or AC coupled interface to the device. If used, the V b b output should be bypassed to

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA P roduct Preview LVEL32 2 Divider The LVEL32 is an integrated +2 divider. The differential clock inputs and the V bb allow a differential, single-ended or AC coupled interface to the device. If used, the V bb output should be bypassed to

MC100EL92

Abstract: AN1560 EL90 SWITCH XCJC AN1503 DL140 LVEL11 LVEL16 motorola LOGIC
Contextual Info: AN1560 Application Note Low Voltage ECLinPS SPICE Modeling Kit Prepared by Cleon Petty Motorola Logic Applications Engineering ECLinPS and ECLinPS Lite are trademarks of Motorola, Inc. 6/97  Motorola, Inc. 1997 1 REV 1 AN1560 Low Voltage ECLinPS SPICE Modeling Kit

Contextual Info: MOTOROLA SEMICONDUCTOR GENERAL INFORMATION Order this document by ELITEBD8/D Engineering Evaluation Board Kit for 8-Pin ECL Devices in the SOIC Package Motorola Part # ELITEBD8 DESCRIPTION This board is designed to provide a low cost characterization tool for evaluating ECL devices in the ECLinPS Lite Product Family.

AZ100LVEL32DG

Abstract: AZ100LVEL32NG AZ100LVEL32TG AZ10LVEL32 LV32 4020 divider
Contextual Info: ARIZONA MICROTEK, INC. LVEL32 LVEL32 PACKAGE AVAILABILITY FEATURES • • • • • ECL/PECL ÷ 2 Divider Operating Range of 3.0V to 5.5V 470ps Propagation Delay 3.0GHz Toggle Frequency High Bandwidth Output Transitions Direct Replacement for ON

K1213

Abstract: k1518 transistor c1213 equivalent transistor k1213 k1112 K1113 k0305 k0205 k0309 equivalent k1117
Contextual Info: AN1560/D Low Voltage ECLinPS and ECLinPS Lite SPICE Modeling Kit Prepared by Senad Lomigora and Paul Shockman ON Semiconductor Broadband Application Engineers http://onsemi.com APPLICATION NOTE Objective The objective of this kit is to extend the information given

k1213

Abstract: transistors k2628 transistor c1213 equivalent k1317 K0316 k2225 transistor k0232 k1117 k1518 k0317
Contextual Info: AN1560/D Low Voltage ECLinPS and ECLinPS Lite SPICE Modeling Kit Prepared by Senad Lomigora and Paul Shockman ON Semiconductor Broadband Application Engineers http://onsemi.com APPLICATION NOTE Objective The objective of this kit is to extend the information given

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview M LVEL32 ^2 Divider The LVEL32 is an integrated +2 divider. The differential clock inputs and the V b b allow a differential, single-ended or AC coupled interface to the device. If used, the V b b output should be bypassed to

k2225 transistor

Abstract: k1118 k1117 k1213 power transistor k1821 transistor k1213 k1117 transistor K2225 k1518 transistor k1117
Contextual Info: AN1560/D Low Voltage ECLinPS and ECLinPS Lite SPICE Modeling Kit 150Prepared by Senad Lomigora and Paul Shockman ON Semiconductor Broadband Application Engineers http://onsemi.com APPLICATION NOTE Objective The objective of this kit is to extend the information given

MOTOROLA 526

Abstract: EL90 AN1503 AN1560 DL140 LVEL11 LVEL16 MJE 521 LVPECL Q26 elite
Contextual Info: AN1560 Application Note Low Voltage ECLinPS SPICE Modeling Kit Prepared by Cleon Petty Motorola Logic Applications Engineering ECLinPS and ECLinPS Lite are trademarks of Motorola, Inc. 7/96  Motorola, Inc. 1996 5–1 REV 0 AN1560 Low Voltage ECLinPS SPICE Modeling Kit

AZ100LVEL32

Abstract: ECL divider marking C2G
Contextual Info: LVEL32 PECL/ECL ÷2 Divider www.azmicrotek.com FEATURES DESCRIPTION • • • The LVEL32 is an integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random logic state; the reset allows for the

SG86A

Abstract: SG53A sg72a LVEP17 MC100ELxxx EP809 LVEL40 SLVS TR30 AND8020
Contextual Info: AN1568/D Interfacing Between LVDS and ECL Prepared by: Paul Lee Logic Applications Engineer ON Semiconductor http://onsemi.com APPLICATION NOTE ECL levels Today’s applications typically use ECL devices in the PECL mode. PECL Positive ECL is nothing more than

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA P roduct Preview h-2 M C LVEL32 D iv id er The M LVEL32 is an integrated +2 divider. The differential clock inputs and the V b b allow a differential, single-ended or AC coupled interface to the device. If used, the V b b output should be bypassed to