LH5324500 Search Results

44-PIN

Abstract: LH5324500 LH5324500N
Contextual Info: LH5324500 FEATURES • 3,145,728 words x 8 bit organization Byte mode 1,572,864 words × 16 bit organization (Word mode) • Access time: 150 ns (MAX.) • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 µW (MAX.) • Static operation • TTL compatible I/O

44-PIN

Abstract: LH5324500 LH5324500N 24M-BIT
Contextual Info: CMOS 24M 3M x 8/1.5M × 16 Mask-Programmable ROM LH5324500 FEATURES • 3,145,728 words × 8 bit organization (Byte mode) 1,572,864 words × 16 bit organization (Word mode) • Access time: 150 ns (MAX.) • Power consumption: Operating: 357.5 mW (MAX.)

Contextual Info: LH5324500 FEATURES CMOS 24M 3M x 8/1.5M x 16 MROM PIN CONNECTIONS • 3,145,728 words (Byte mode) x 1,572,864 words (Word mode) x 8 bit organization 44-PIN SOP TOP VIEW S 1• A-I8 C 2 43 — I a 19 A17IZ 3 42 ^ A8 • Access time: 150 ns (MAX.) a7C 4 41 Zl Ag

LH5324500

Abstract: LH5324500N as3145
Contextual Info: LH5324500 CMOS 24M 3M x 8/1.5M x 16 M ask-Program m able ROM FEATURES PIN CONNECTIONS • 3,145,728 words x 8 bit organization (Byte mode) 44-PIN SOP r 1,572,864 words x 16 bit organization (Word mode) • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 p-W (MAX.)

Contextual Info: LH5324500 FEATURES • 3,145,728 words x 8 bit organization Byte mode 1,572,864 words x 16 bit organization (Word mode) • Access time: 150 ns (MAX.) • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 \i\N (MAX.) CMOS 24M (3M x 8/1.5M x 16) MROM

Contextual Info: LH5324500 FEATURES • 3,145,728 words x 8 bit organization Byte mode 1,572,864 words x 16 bit organization (Word mode) • Access time: 150 ns (MAX.) • Power consumption: Operating: 357.5 mW (MAX.) Standby: 550 nW (MAX.) • Static operation • TTL compatible I/O

536G

Abstract: LH534600
Contextual Info: MEMORIES • Mask ROMs Process Capacity * Configuration words X bits Pinout Access time Model No. (ns) MIN. Supply current (mA) MAX. Supply voltage (V) (ns) MAX. User's No. Cycle tima Package 256k 32k X 8 J LH53259D/N/T L H 5359X X 150 25 5 ± 10% 28DIP/28SOP/28TSOP(I)

lh57257

Abstract: IR2E31 IR2E01 IR2C07 IR2E27 IR2E24 IR2E19 IR2E31A IR3n06 IR2E02
Contextual Info: Index Model No. ARM7D CPU Core Bi-CMOS 1 27 40,42 _ _ CMOS CMOS CMOS CMOS CMOS 4A 5A 8 A AH D ID1 Series ID2 Series 40,42 40.42 40,42 40,42 40 B ü.’1*"! 14,15 14 m IR2339 IR2403 IR2406 IR2406G IR2410 IR2411 IR2415 IR2419 IR2420 IR2422 IR2425 IR2429

LH231G

Abstract: lh5348 LH538b LH2326 lh5s4 LHMN5 lh5359 lh5348xx lh537 LH235
Contextual Info: MEMORIES ★Under development • M ask ROMs SlpÉHRfi Bonflgmllan jvorai x d m i NMOS <"^g|g|ï|ïi£- User1* No. sssysr Sllpjiijp 1 currant mA MAX. ■ Paefcagfe ft- • 64k 8k x 8 LH2389D LH2369XX 200 60 5 ± 10% 28DIP 128k 16k x 8 LH23128D LH2326XX 200

lh5s4

Abstract: lh537 48-TSOP LH5s 42-DIP 48TSOP1 LH5364P00D LH538 LH5S46
Contextual Info: MEMORIES • Mask ROM Specific Pinout ★ U n d e rd e v e lo p m e n t • 3 V 3 .3 V operation Access time B it C a p a c ity configuration 1M x8 2M x 8/x 16 4M x 8/x 16 8M x 8/x 16 16M x 8/x 16 32 M x 8/x 16 64M 128M * x 8/x 16 x 16 Readable at 2.7 V.

flash 64m

Contextual Info: MEMORIES Mask ROMs C a p a c ity Access time C o nfig u ra tio n 120ns 100ns 80ns 150ns 256kj I 32k x 8 ] LH53259 12k I 64k x 8 LH53517 128k x 8 LH530800A LH531V00 1M LH531024 64k x 16 i LH532100B-1 256k x 8 ! LH532100B 2M JEDEC standard EPROM pinout 128k x 161

IR3Y29B

Abstract: ir3y26a1 IR4N IR3T24N IR3C08N ir2c53 ir2c05 li3301 IR3Y08 IR2E02
Contextual Info: Index Model No. IR3T ARM710 ARM7DI ARM7DM ARM7TDMI ARM7TDMI-SPL ARM8 ARM810 CMOS CMOS CMOS CMOS F series G series J series K series ID22 series ID222XX ID223XX ID224XX ID226XX ID227XX ID229XX ID22DXX ID22FXX ID22HXX ID240 series ID240DXX ID240EXX ID240GXX

LH5324000D

Abstract: LH5324C00 LH5324C00D LH5365 sharp mask rom 48TSOP LH536
Contextual Info: SHARP NEW PRODUCT INFORMATION LH5324C00 • 24M-bit Mask-Programmable ROM ■ Description Pin Connections The LH5324C00D User’s No. : LH536CXX is a CMOS 24M-bit mask-programmable ROM organized as 1 572 864 X 16 bits. It is fabricated using sillicon-gate CMOS process

48 tsop flash pinout

Abstract: LH23512
Contextual Info: MEMORIES Mask ROMs ^Under development Capacity Pinout Model No. Configuration Access time ns 55 1 64k !- 1 8k x 8 128k 16k x ! 256k 32k x 8 |- -) [ 512k 64k x 8 b — I 80 100 120 150 200 Package 250 500 □ LH2369 28 LH23255 28 □ LH53259 28 28 38(1)