HC112 Search Results

hc251

Abstract: dual schmitt-trigger inverters
Contextual Info: Contents HC/HCT Gates/MSI/Octals ’HCOO ’HCTOO ’HC02 'HCT02 ’HC03 ’HC04 ’HCU04 'HCT04 'HC05 'HC08 'HCT08 'HC10 ’HC11 ’HC14 ’HCT14 'HC20 'HC21 'HC27 ’HC32 ’HCT32 ’HC42 ’HC74 ’HCT74 'HC86 'HC112 'HC125 'HCT125 'HC126 ’HC132 ’HC138

IC 74HC112

Abstract: 74HC112
Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- CD54/HC112, CD54/74HCT112 Data sheet acquired from Harris Semiconductor SCHS141A Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised May 2000

Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- HC112, HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141F Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised May 2003

Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- HC112, HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003

Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- HC112, HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003

Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- HC112, HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003

CD74HC112

Abstract: 74HCT 74LS CD74HC112E CD74HCT112
Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- HC112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141 Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 Features at VCC = 5V

Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- HC112, HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003

Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- HC112, HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003

CD54HC112

Abstract: CD54HC112F3A CD54HCT112 CD54HCT112F3A CD74HC112 CD74HCT112
Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- HC112, HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003

Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- HC112, HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003

Contextual Info: [ /Title CD74 HC112 , CD74 HCT11 2 /Subject (Dual J-K FlipFlop with Set and Reset Nega- HC112, HC112, CD54HCT112, CD74HCT112 Data sheet acquired from Harris Semiconductor SCHS141H Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger March 1998 - Revised October 2003

74HC4096

Abstract: EQUIVALENT TIMER IC WITH CD 4060 rs flip-flop IC 7400 C4050A shiftregister PIPO C148A LS 7476 L1AA C4051A LS294
Contextual Info: Selection Guide C2MOS Logic TC74HC/HCT Series 2. High Speed CMOS Selection Guide GATE NAND HCOOA NOR AND OR INVERTER, BUFFER EXCLUSIVE OR/NOR SC HM ITT TRIGGER HC02A HC08A H C31A H C04A H C86A H C14A H C51A H C4049A M ULTI FUNCTION LEVEL SHIFTER HCTOOA HCT02A

specifications of transistor AC126

Abstract: hc132a hc138a specifications of AC126 HC74A TC7PGU04FU transistor AC126 hc273a -toshiba toshiba vhc32 TC4W53FU
Contextual Info: SEMICONDUCTOR GENERAL CATALOG General-Purpose Logic ICs CMOS Logic ICs Low-Voltage CMOS Logic ICs CMOS Logic ICs in Ultra-Small US Packages Dual-Supply Level Shifters CMOS Bus Switch ICs Application-Specific Logic One-Gate CMOS L-MOS 1 2009-8 SCE0004I CMOS Logic ICs (74AC, 74VHC, 74HC and Standard Series) Quick Reference

LS112

Abstract: 948F MC74HC112 MC74HCXXXD MC74HCXXXN
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA HC112 Dual J-K Flip-Flop with Set and Reset High–Performance Silicon–Gate CMOS The HC112 is identical in pinout to the LS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are

74 Series Logic ICs

Abstract: transistor AC126 74HC octal bidirectional latch cx 4060 8pin hc257a TC7PG17AFE TC7SG07FE Transistor 123AP AC139 hc11a
Contextual Info: General-Purpose Logic ICs CMOS Logic ICs z 94 Low-Voltage CMOS Logic ICs z 100 CMOS Logic ICs in Ultra-Small US Packages z 104 Dual-Supply Level Shifters z 106 CMOS Bus Switch ICs z 108 Application-Specific Logic z 110 One-Gate CMOS L-MOS z 112 89 CMOS Logic ICs (74AC, 74VHC, 74HC and Standard Series) Quick Reference

SN54HC112

Abstract: SN74HC112 SN74HC112D SN74HC112DR SN74HC112N SNJ54HC112FK SNJ54HC112J SNJ54HC112W
Contextual Info: HC112, HC112 DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCLS099D – DECEMBER 1982 – REVISED DECEMBER 2002 HC112 . . . J OR W PACKAGE HC112 . . . D OR N PACKAGE TOP VIEW Wide Operating Voltage Range of 2 V to 6 V

SN54HC112

Abstract: SN74HC112
Contextual Info: HC112, HC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCLS099C – DECEMBER 1982 – REVISED APRIL 1999 HC112 . . . J OR W PACKAGE HC112 . . . D OR N PACKAGE TOP VIEW Package Options Include Plastic Small-Outline (D) and Ceramic Flat (W)

Contextual Info: HC112, HC112 DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCLS099F − DECEMBER 1982 − REVISED SEPTEMBER 2003 HC112 . . . J OR W PACKAGE HC112 . . . D OR N PACKAGE TOP VIEW Wide Operating Voltage Range of 2 V to 6 V

Contextual Info: HC112, HC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCLS099C – DECEMBER 1982 – REVISED APRIL 1999 HC112 . . . J OR W PACKAGE HC112 . . . D OR N PACKAGE TOP VIEW Package Options Include Plastic Small-Outline (D) and Ceramic Flat (W)

SN54HC112

Abstract: SN74HC112 SN74HC112D SN74HC112DR SN74HC112DT SN74HC112N SNJ54HC112J SNJ54HC112W HC112
Contextual Info: HC112, HC112 DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCLS099F − DECEMBER 1982 − REVISED SEPTEMBER 2003 HC112 . . . J OR W PACKAGE HC112 . . . D OR N PACKAGE TOP VIEW Wide Operating Voltage Range of 2 V to 6 V

Contextual Info: HC112, HC112 DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCLS099D – DECEMBER 1982 – REVISED DECEMBER 2002 HC112 . . . J OR W PACKAGE HC112 . . . D OR N PACKAGE TOP VIEW Wide Operating Voltage Range of 2 V to 6 V

Contextual Info: Complete, High Speed 16-Bit A/D Converters AD1376/AD1377 FEATURES Digital output data is provided in parallel form with corresponding clock and status outputs. All digital inputs and outputs are TTL-compatible. Complete 16-bit converters with reference and clock

Contextual Info: HC112, HC112 DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SCLS099F − DECEMBER 1982 − REVISED SEPTEMBER 2003 HC112 . . . J OR W PACKAGE HC112 . . . D OR N PACKAGE TOP VIEW Wide Operating Voltage Range of 2 V to 6 V