EP910T Search Results

EP910T

Abstract: altera EP910 EP910-T
Contextual Info: EP910T EPLD Features □ □ a □ □ High-performance, 24-macrocell Classic EPLD Combinatorial speeds with tPD = 30 ns Counter frequencies up to 33 MHz Pipelined data rates up to 41 MHz Programmable I/O architecture with up to 36 inputs or 24 outputs Pin-, function-, and programming file-compatible with Altera's EP910

Contextual Info: Features a General Description Altera's EP910T Erasable Programmable Logic Device EPLD is a lowcost, high-performance version of the EP910 device. This EPLD operates in a turbo mode that is optimized for high-speed applications. The Turbo Bit in the device is preset at the factory. The EP910T EPLD is available in OTP

910T

Contextual Info: EP910T EPLD Features □ □ □ □ General Description A lte ra 's E P 910T E rasable P ro g ra m m a b le L ogic D ev ice E P L D is a low cost, h ig h -p erfo rm a n ce version o f the E P 910 d ev ice. T h is E PL D o p erates in a tu rbo m o d e that is op tim ized for h ig h -sp eed ap p licatio n s. T h e T u rb o Bit

FC SUFFIX altera

Contextual Info: Classic EPLD Family Data Sheet M arch 1995, ver. 2 Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ Table 1. Classic Device Features Feature EP22V10 EP22V10E EPB10 EP610T EP610I EP910 EP910T EP910I EP1810 EP1810T Available gates 400 600 600 900 900 1,800 Usable gates

EPLD

Abstract: EP910A SR flipflops EP310 EP910
Contextual Info: E P 910 E P L D Features □ □ □ □ □ □ □ □ General Description H igh-perform ance 24-m acroeell EPLD Com binatorial speeds with t?D = 30 ns Counter frequencies up to 33 MHz Pipelined data rates up to 41 M H z Pin-, function-, and JEDEC-File-com patible with A ltera's EP910A and

EP910

Abstract: altera EP910
Contextual Info: EP910 EPLD Features • ■ ■ ■ ■ ■ High-performance, 24-macrocell Classic EPLD Combinatorial speeds with tPD as low as 12 ns Counter frequencies of up to 100 MHz Pipelined data rates of up to 100 MHz Programmable I/O architecture with up to 36 inputs or 24 outputs

910-A01

Contextual Info: EP910A EPLD High-Performance 24-Macrocell Device March 1993, ver. 2 Data Sheet Supplement Features □ □ P relim inary Inform ation □ □ □ □ □ □ Highest-performance 24-macrocell Classic EPLD Combinatorial speeds with tPD = 10 ns Counter frequencies up to 100 MHz

programming manual EPLD EPS448

Abstract: Altera EPM5128 EPM7064-12 leap u1 EP-900910 PLE3-12a tcl tv circuit altera eplds EP610 "pin compatible" ALTERA MAX 5000
Contextual Info: Data Book TENTH ANNIVERSARY A Decade of Leadership A u g u s t 1993 Data Book August 1993 A-DB-0793-01 Altera, MAX, and M A X+PLUS are registered trademarks of Altera Corporation. The following, among others, are trademarks of Altera Corporation: AHDL, M AX+PLUS II, PL-ASAP2, PLDS-HPS, PLS-ADV, PLS-ES, PLS-FLEX8, PLS-FLEX8/H P, PLS-FLEX8/SN , PLS-HPS, PLS-STD, PLS-W S/H P,

16cudslr

Abstract: EP320I EPM7160 Transition vhdl code for lift controller EPM9560 ep330 INTEL 8-series NEC 9801 altera ep220 Silicon Laboratories
Contextual Info: M+2Book Page i Thursday, June 12, 1997 12:49 AM MAX+PLUS II Programmable Logic Development System Getting Started Altera Corporation 2610 Orchard Parkway San Jose, CA 95134-2020 408 894-7000 M+2TOC+ Page iii Monday, June 9, 1997 9:34 AM Contents Preface

altera EP910

Abstract: EP910-T IEP910 altera eplds EP910EPLD
Contextual Info: t ALTERA 47E CORP D • 05*15372 00020TM - r Tfl? o - ■ c f ALT EP910 EPLDs High-Performance 24-Macrocell Devices Data Sheet September 1991, ver. 2 □ □ Features □ □ □ □ □ □ □ General Description Altera's EP910 Erasable Programmable Logic Devices EPLDs can

altera ep900

Abstract: ep900 24-MACROCELL
Contextual Info: EP900 EPLD 24-Macrocell Device June 1993, ver. 1 Data Sheet Supplement Features □ □ □ □ □ □ 24-macrocell Classic EPLD Combinatorial speeds with tPD = 50 ns Counter frequencies up to 20.0 MHz Pipelined data rates up to 23.8 MHz Programmable I/O architecture with up to 36 inputs or 24 outputs

ulc xc3030

Abstract: PQFP 176 Xilinx XC3090 altera EP300 EPM7128 Temic ulc xc3030 EPM7128 PLCC PLSI2032 Actel A1020 PLUS405
Contextual Info: ULC Reference Guide This reference guide lists most devices available for conversion. This list is not exhaustive, as new devices are added regularly. Additional devices not shown in this list may also be supported. Updated versions are available on the TEMIC web site. Check with factory if

Contextual Info: EP910A EPLD Features Preliminary Information □ □ □ □ □ □ Highest-performance, 24-macrocell Classic EPLD Combinatorial speeds with tPD = 10 ns - Counter frequencies up to 100 MHz - Pipelined data rates up to 125 MHz Fabricated on advanced 0.8-micron CMOS EEPROM technology

ep330

Abstract: CLASSIC EPLD FAMILY altera EP1810
Contextual Info: Operating Requirements for Altera Devices March 1995, ver. 6 Datasheet A ltera devices com bine unique program m able logic architectures w ith advanced C M O S processes to p rovid e exceptional perform ance and re lia b ility. To m aintain the highest possible perform ance and re lia b ility of

Device-List

Abstract: NEC D2716D novatek nt68f63 nt68f63 NEC D2732D D2716D 16V8H-25 ATMEL 220 24C16 D2732D 16V8H-15
Contextual Info: LabTool-48 Version 4.67 <ALL> Device List Page 1 of 20 ACTRANS AC29LV400B *44PS AC29LV400B *48TS AC29LV400T *44PS AC29LV400T *48TS ALi M6759 M6759 *44 M6759 *44Q M8720 Alliance AS29F040 AS29LV800T *48TS AS29LV800B *44PS AS29LV800B *48TS AS29LV800T *44PS Altera

NEC D2732D

Abstract: nt68f63 novatek nt68f63 d2716d NEC D2716D atc 93lc46 D2732D CIRCUIT NEC D2716D TMS87C510 16V8H-25
Contextual Info: Dataman-48 Version 4.30 <ALL> Device List ALi M6759 www.dataman.com M6759 *44 M6759 *44Q M8720 AS29LV800B *44PS AS29LV800B *48TS AS29LV800T *44PS Altera EP1210 EP220 EP312 EP330 EP900 EP910-T EPC1064 EPC1213 EPC1441 as 1213 EPM3064A *44 EPM5192 @84 EPM7032AEas7032 *44

EP910

Contextual Info: EP910 EPLDs 'A Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ □ □ □ □ High-density replacement for TTL and 74HC with up to 900 gates High-performance 24-macrocell EPLD with tPD = 25 ns and counter frequencies up to 40 MHz Zero-power operation 20 (iA standby

ALTERA MAX 5000 programming

Abstract: EP910-t altera EP910 24-MACROCELL osbt
Contextual Info: EP910 EPLD • Features ■ ■ ■ ■ ■ High-performance, 24-macrocell Classic EPLD Com binatorial speeds with t PD as low as 12 ns - Counter frequencies of up to 100 MHz - Pipelined data rates of up to 100 MHz Program m able I/O architecture with up to 36 inputs or 24 outputs

atc 93lc46

Abstract: 25LV512 39SF020A 25LV010 49LF040 25LF020A 95p08 89lpc932 nt68f63g 39vf020
Contextual Info: LabTool-48XP Version 5.60 <ALL> Device List Page 1 of 23 ACTRANS AC29LV400B *44PS AC39VF080 *40TS AC29LV400B *48TS AC39VF088 *48TS AC29LV400T *44PS AC39VF800 *48TS AC29LV400T *48TS ALi M6759 M6759 *44 M6759 *44Q M8720 Alliance AS29F040 AS29LV800T *48TS AS29LV400B *48TS

PLDS-MAX

Abstract: Altera Classic EPLDs Altera LP5 ALTERA MAX 5000 programming ALTERA MAX 5000 eps448 logicaps sam plus mpm5192 PLDS-ENCORE
Contextual Info: Index September 1991 A+PLUS design entry 301 design processing 303 EPLD programming 304 functional simulation 304 o verview 299 ABEL2MAX Converter 356 adapters sff P L E D /J /G /S /Q & P L M D /J /G /S /Q adapters ADP (see Altera Design Processor) AHDL (s«1 Altera Hardware Description Language)

EP910

Abstract: ep910-30
Contextual Info: EP910 EPLD Features □ □ □ □ □ □ High-performance, 24-macrocell Classic EPLD Combinatorial speeds with tPD = 30,35, and 40 ns Counter frequencies up to 33 MHz Pipelined data rates up to 41 MHz Programmable I/O architecture with up to 36 inputs or 24 outputs

altera EP300

Abstract: EPM7128 EPLD ep330 mpm5192 MPM512 MPM5128 alternative bipolar transistors book
Contextual Info: M M r M p , 0 9 ra m m r .lv Data Sheet September 1991, ver. 2 Introduction 0 £ Programm able Logic Devices also described as P A L s , P L A s, F P L A s, PLD s, E P L D s , E E P L D s , LC A s, and F P G A s combine the logistical advantages of standard, fixed integrated circuits with the architectural flexibility of custom

Contextual Info: Features □ Ü J J General Description A ltera's EP910 Erasable P ro g r a m m a b le Logic Device EPLD can im p le m e n t u p to 900 e q u iv a le n t g ates of SSI a n d MSI logic. It is available in w i n d o w e d ceram ic or O T P plastic 40-pin DIP an d 44-pin J-lead chip carrier packages.

Altera LP5

Abstract: Altera EP1800 logicaps schematic capture EPM5016 EP1810 PLEj1810 PLDS-MAX ep330 EPS448D 02D-00209
Contextual Info: AN Ü □ !^ V a \ Product Selection Guide Data Sheet September 1991, ver. 2 In t r o d u c t io n P r°d u c t Selection G uid e summarizes the range of products available from Altera: U □ U Ü U U U General-purpose E P L D s Function-specific E P L D s