80960 KB 25 Search Results

85C960

Abstract: D85C960-20 231369 d85c960-25 Erasable Programmable Logic Device 610 LSC5
Contextual Info: in te i 85C960 1-MICRON CHMOS 80960 K-SERIES BUS CONTROL juPLD Burst Logic, Ready Control, and Address Decode Support for 80960 KA/KB Embedded Controllers In Single Chip Operates with 80960KA/KB at 16 MHz, 20 MHz, and 25 MHz UV Erasable CerDIP or O T P tm

Contextual Info: 85C960 1-MICRON CHMOS 80960 K-SERIES BUS CONTROL juPLD • Burst Logic, Ready Control, and Address Decode Support for 80960 KA/KB Embedded Controllers in Single Chip ■ Operates with 80960KA/KB at 20 MHz and 25 MHz ■ Ice = 50 mA Max. ■ UV Erasable CerDIP or OTPTM

ICE-50

Abstract: 290134 290192
Contextual Info: in t e T 85C960 1-MICRON CHMOS 80960 K-SERIES BUS CONTROL juPLD • Operates with 80960KA/KB at 20 MHz and 25 MHz ■ Ice ~ 50 mA Max. ■ UV Erasable CerDIP or OTPtm ■ 100% Generlcally Testable Logic Array ■ Based on Low Power CHMOS HIE* Technology

80960CA

Abstract: 80960CF 80960HA 80960HD 80960JA 80960JD 80960JF 80960KA 80960KB 80960SA
Contextual Info: i960 MICROPROCESSOR BENCHMARK REPORT Order Number: 272950-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in

80960CA

Abstract: 80960CF 80960HA 80960HD 80960JA 80960JD 80960JF 80960KA 80960KB 80960SA
Contextual Info: i960 Microprocessor Benchmark Report January 1998 Order Number: 272950-002 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability

MCC68k

Abstract: mvme167 intel 1302 ROM amd 29030 80386 intel microprocessor qt960 29030 SRAM 6114 80960 KB 25 IDT 3081E
Contextual Info: i960 MICROPROCESSOR COMPETITIVE BENCHMARK REPORT Nov. 3, 1993 80960 Applications Engineering Intel Corporation 5000 W. Chandler Blvd. C5-233 Chandler AZ 85226 06/13/95 Intel Corporation makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in

Small Slide Switch

Abstract: 80960 POWER 80960CF 80960HD 80960JD PROCESS CONTROL TIMER BASED TOPICS 87uS "network interface cards"
Contextual Info: Implementing ATM Rate-Based Flow Control Algorithms Using an Embeddded Microprocessor Slide #2 Slide #1 Implementing ATM Rate-Based Flow Control Algorithms Using an Embedded Microprocessor O u tlin e • A T M D esig n C h alle ng es • A T M O ve rview • A T M F u n ctio n s P e rfo rm e d b y an

dhrystone

Abstract: 80960CA 80960CF 80960HA 80960HD 80960HT 80960JA 80960JD 80960JF 80960JT
Contextual Info: i960 Microprocessor Performance Brief October 1998 Order Number: 272950-003 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability

applications of microprocessor in printer

Abstract: 272238 hp 2731 80960CA EP80960 80960KB Programmer Reference manual embedded dram ibm embedded microprocessors MON960 QIC-24
Contextual Info: i960 Microprocessor CTOOLS Application Development Tools PRODUCT HIGHLIGHTS • Improved Code ® Generation for the i960 Rx, Jx and Hx Processor Families ■ Easy-to-Use Whole- Program and ProfileDriven Optimizations ■ Debug of Optimized Code Using DWARF 2.0

d85c960-25

Abstract: UP200 85C508 D85C960-20
Contextual Info: in t ô l, 85C960 1-MICRON CHMOS 80960 K-SERIES BUS CONTROL jaPLD • ■ ■ ■ B u rst L ogic, R e a d y C o n tro l, and A d d re s s D e c o d e S u p p o rt fo r 80 96 0 K A /K B E m b e d d e d C o n tro lle rs in Single Chip ■ O p e ra te s w ith 8 0 9 6 0 K A /K B a t 20 M H z

list of Applications of microprocessor

Abstract: applications of microprocessor in printer PC 80960 intel Programmers Reference Manual INTEL application notes embedded dram ibm IEEE-695 MON960 QIC-24 272495
Contextual Info: i960 Microprocessor CTOOLS Application Development Tools PRODUCT OVERVIEW Intel’s CTOOLS provides a complete set of PROVEN OPTIMIZATION TECHNIQUES application development tools for developing Advanced optimization techniques are embedded designs, including an advanced

applications of microprocessor in printer

Abstract: embedded dram ibm Microprocessor IEEE-695 MON960 QIC-24 intel Programmers Reference Manual AB42 EV80960SX 272238
Contextual Info: i960 Microprocessor CTOOLS Application Development Tools PRODUCT OVERVIEW Intel’s CTOOLS provides a complete set of PROVEN OPTIMIZATION TECHNIQUES application development tools for developing Advanced optimization techniques are embedded designs, including an advanced

intel 82556

Abstract: Host uP 82556 I960 DMA controller associated with motherboard chipset to interface Intel Pentium 4 i960RP
Contextual Info: PCI Intelligent I/O Design for High Performance Servers PCI Intelligent I/O Design for High Performance Servers Byron Gillespie Strategic Development Manager Intel Corporation PCI Intelligent I/O Design for High Performance Servers Abstract High-speed networks create pressure on servers for improved system level performance. The system I/O

IN1016

Abstract: 80960HA 80960HD 80960HT 80960JA 80960JD 80960JF 80960JT PQFP 128 Fast Ethernet Risc
Contextual Info: i960 JA/JF/JD/JT Microprocessors PRODUCT HIGHLIGHTS • Low Power Modes ■ Improved cache design ■ State of the art testability ® ■ i960 processor compatible RISC core ■ 100 MIPS execution for the JT-100 ■ 16-Kbyte 2-way set associative instruction

27960K2-25

Abstract: 27960KX D-10 intel PLD
Contextual Info: in te J ra n u s M u m 27960KX BURST ACCESS 1M 128K x 8 CHMOS EPROM • Synchronous 4-Byte Data Burst Access ■ Simple Interface to the 80960KA/KB ■ High Performance Clock to Data Out — Zero Wait State Data-to-Data Burst — Supports 16, 20 and 25 MHz

5223 eprom

Abstract: 29023
Contextual Info: m g y iM O N M v 27960KX BURST ACCESS 1M 128K x 8 CHMOS EPROM • Synchronous 4-Byte Data Burst Access ■ Simple Interface to the 80960KA/KB ■ High Performance Clock to Data Out — Zero Walt State Data-to-Data Burst — Supports 16, 20 and 25 MHz 80960KA/KB Devices

80960HA

Abstract: 80960HD 80960HT 80960JA 80960JD 80960JF 80960JT 388Ld 82961KD 100-pin BGA
Contextual Info: i960 JA/JF/JD/JT Microprocessors PRODUCT HIGHLIGHTS • Low Power Modes ■ Improved cache design ■ State of the art testability ® ■ i960 processor compatible RISC core ■ 100 MIPS execution for the JT-100 ■ 16-Kbyte 2-way set associative instruction

i960CA

Abstract: ka 20885 D 80960 EP80960BB atu-3 FF90FF i960 KA/KB Programmers Reference Manual 80960CF 80960RP IQ80960RP
Contextual Info: Getting Started with the 80960 QUICKval Kit i960 Microprocessor Evaluation Kit Order Number: 632708-005 Revision Revision History Date -001 Original Issue. 12/94 -002 80960Hx and PCI80960DP chapters added. Additional examples for all processors added. 12/95

PAL Decoder 16L8

Abstract: intel microcontroller 8096 8096 microcontroller features 27960K2-25 27960KX D-10 intel PLD
Contextual Info: i n t e J 27960KX BURST ACCESS 1M 128K x 8 CHMOS EPROM • Synchronous 4-Byte Data Burst Access ■ Simple Interface to the 80960KA/KB ■ High Performance Clock to Data Out — Zero Wait State Data-to-Data Burst — Supports 16, 20 and 25 MHz 80960KA/KB Devices

272737

Abstract: 80960JF
Contextual Info: IP[n3 [ [!J©T [PGiEWOG in te i 80960RP INTELLIGENT I/O MICROPROCESSOR • ■ PCI-to-PCI BRIDGE UNIT HIGH PERFORMANCE 80960JF CORE — Primary and Secondary PCI Interfaces — Sustained One Instruction/Clock — Two 64-Byte Posting Buffers Execution — Supports Delayed and Posted

80960Rm

Abstract: aaaz 80960RN 0x00001450 0x00001204 0x0000101B 0x00001240
Contextual Info: 80960RM/RN Processor Initialization: Programming Guide & Initialization Code Application Note August 1998 Order Number: 273166-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

FLS 441

Abstract: 27960K2-25 27960KX SS31 aos trace code
Contextual Info: irrte1 27960KX BURST ACCESS 1M 128K x 8 CHMOS EPROM • Synchronous 4-Byte Data Burst Access ■ Simple Interface to the 80960KA/KB ■ Asynch Microcontroller Reset Function ~ " e*ur"s to Known state with Hi9h z Outputs a . .« * « .- * ■ CHMOS’ lll-E for High Performance and

Contextual Info: in te i i960 KA/KB PROCESSOR PRODUCT OVERVIEW INTRODUCTION This chapter provides an overview of the Intel i960 KB processor which is part of the i960 K series of embedded-processor products . All of the processors in the i960 K series of products are based on the Intel i960™ architecture. Most of the

HTR resistors

Abstract: 80960 80960SA reference i960 RP Processor 80960JF STT 433 1250H clock generator in dual core processor i960 Cx Instruction Set Quick Reference i960 Cx Processor Instruction Set Quick Reference
Contextual Info: i960 RP Microprocessor User’s Manual i960® RP Microprocessor User’s Manual February 1996 Order Number: 272736-001 Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for