80960HX Search Results

TS PQ4 12

Abstract: TS PQ4 24 ts pq4 10 TS PQ4 20 TS PQ4 120
Contextual Info: in y 1.0 80960HA/HD/HT About This Document This document describes the parametric performance of Intel’s 80960Hx embedded superscalar microprocessors. Detailed descriptions for functional topics — other than parametric performance — are published in the i960 H x M icroprocessor U ser’s Guide 272484 .

i960CA

Abstract: ka 20885 D 80960 EP80960BB atu-3 FF90FF i960 KA/KB Programmers Reference Manual 80960CF 80960RP IQ80960RP
Contextual Info: Getting Started with the 80960 QUICKval Kit i960 Microprocessor Evaluation Kit Order Number: 632708-005 Revision Revision History Date -001 Original Issue. 12/94 -002 80960Hx and PCI80960DP chapters added. Additional examples for all processors added. 12/95

1N4002

Abstract: 80960CF 80960Cx
Contextual Info: Designing for 80960Cx and 80960Hx Compatibility Application Note December 1997 Order Number: 272556-003 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

8510H

Abstract: i960 Cx Processor Instruction Set Quick Reference 80960CA AP-716 MCON00
Contextual Info: A AP-716 APPLICATION NOTE 80960Cx/80960Jx/80960Hx Architectural Comparison Tom Johnson SPG 80960 Systems Engineer Intel Corporation Mail Stop CH6-311 5000 W. Chandler Blvd. Chandler, Arizona 85226 January 29, 1996 Order Number: 272694-001 Information in this document is provided solely to enable use of Intel products. Intel assumes no liability

Intel AP-506

Abstract: 811 D17 031 TRANSISTOR i960HA
Contextual Info: intei AP-506 APPLICATION NOTE Designing for 80960Cx and 80960Hx Compatibility March 1995 I 1-433 AP-506 INTRODUCTION The 80960HA/HD/HT^ processors, Intel’s new superscalar i960 processor, adds new features and performance to the other well-known products in the i960 processor family. The 80960Hx

1N4002

Abstract: 80960CF 272556 AP-505
Contextual Info: A LITERATURE CHANGE NOTICE SEMICONDUCTOR PRODUCTS DIVISION - 80960 Subject:Updates for AP-506, Designing for 80960Cx and 80960Hx Compatibility Intel literature number 272556-001 18 October 1995 Dear Customer: Thank you for ordering the Applications Note AP-506, Designing for 80960Cx and 80960Hx

Contextual Info: 80960H A/H D/HT in te i 1.0 ABOUT THIS DOCUMENT This document describes the parametric perfor­ mance of Intel’s 80960Hx embedded superscalar microprocessors. Detailed descriptions for functional topics — other than parametric performance — are published in the i9 6 P H x M icroprocessor User’s

272484

Abstract: A2Y 4h 80960MX
Contextual Info: in t J AP-716 APPLICATION NOTE 80960Cx/80960Jx/80960Hx Architectural Comparison January 29, 1996 Order Number: 272694-001 1-607 in y 1.0 AP-716 Introduction This document describes three implementations of the i960 architecture: the 80960Cx, 80960Jx, and 80960Hx

8096 processor architecture

Contextual Info: intei 1.0 8 0 9 6 0 H A/H D / H T This docum ent provides a preview of Intel’s 80960Hx embedded superscalar microprocessors. Future revisions of this docum ent will provide targeted electrical characteristics. Detailed descriptions for functional topics — other than param etric perfor­

Contextual Info: 80960HA/HD/HT 1.0 ABOUT THIS DOCUMENT This document provides a preview of Intel’s 80960Hx embedded superscalar microprocessors. Future revisions of this document will provide targeted electrical characteristics. Detailed descriptions for functional topics — other than parametric perfor­

Contextual Info: irrtel LITERATURE CHANGE NOTICE SEMICONDUCTOR PRODUCTS DIVISION - 80960 Subject: Updates for AP-506, Designing for 80960Cx and 80960Hx Compatibility Intel literature number 272556-001 18 October 1995 Dear Customer: Thank you for ordering the Applications Note AP-506, Designing for 80960Cx and 80960Hx

Contextual Info: [PIM2>[E U T P^E^OO in te i 80960HA/HD/HT 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR • Binary Compatible with Other80960 Processors • Two Instructions/Clock Sustained Execution 32-Bit Parallel Architecture — Load/Store Architecture — Sixteen 32-Bit Global Registers

micro instruction set of I960 hx

Abstract: 80960CA 80960CF 80960HA 80960HD 80960HT 80960JA Intel i960
Contextual Info: Intel i960® Processors i960® Architecture Family Product Highlights • 32-bit register-based RISC core in all processors ■ Code compatibility across entire product line ■ Broad selection of price and performance levels ■ Ideal for networking and imaging

Non-Pipelined processor

Abstract: 80960HA 80960HD 80960HT A80960HT60 272495
Contextual Info: 80960HA/HD/HT 32-Bit High-Performance Superscalar Processor Datasheet Product Features • ■ ■ ■ ■ ■ 32-Bit Parallel Architecture — Load/Store Architecture — Sixteen 32-Bit Global Registers — Sixteen 32-Bit Local Registers — 1.28 Gbyte Internal Bandwidth

80960HT

Abstract: 80960HA 80960HD 272495 D1365 D2962 2xcore
Contextual Info: ADVANCE INFORMATION 80960HA/HD/HT 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR • 32-Bit Parallel Architecture ■ 3.3 V Supply Voltage — — — — Load/Store Architecture Sixteen 32-Bit Global Registers Sixteen 32-Bit Local Registers 1.2 Gbyte Internal Bandwidth

MC 9080

Abstract: hp image point hx 210830 EP80960 auto changing in/out indicator doorbell project i960 MC Programmers Reference Manual MON960 seven segment quad digit display red input pci9080 53c87
Contextual Info: MON960 Debug Monitor User’s Guide Order Number: 484290-008 Revision Revision History Date -001 Original Issue. 01/93 -002 Updated for V1.1 release. 02/93 -003 Revised for MON960 release 2.0. 05/94 -004 Revised for MON960 release 2.1. 11/94 -005 Revised for MON960 release 3.0.

sun hold RAS 0610

Abstract: eeprom programmer schematic 24c08 80960KB Programmer Reference manual 270929 KDS crystal 20.000 zilog 4202 IC 24c08 PCI cyclone 3 schematics KDS 4.000 Crystal cpu 80960kx
Contextual Info: i960 Microprocessor User’s Guide for Cyclone and PCI-SDK Evaluation Platforms April 1996 Order Number: 272577-002 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

5A6H

Abstract: intel atom microprocessor 5a1h 80960Cx i960 Cx Instruction Set Quick Reference i960 Cx Processor Instruction Set Quick Reference om-1 st stt 128 transistor mark code g8 610H
Contextual Info: Instruction Set Reference 1 This chapter provides detailed information about each instruction available to the i960 Jx processor. Instructions are listed alphabetically by assembly language mnemonic. Format and notation used in this chapter are defined in Section 1.1, “Notation” pg. 1-1 .

intel atom microprocessor

Abstract: PC 80960 001-page 272495 32-bit intel microprocessor architecture dcct i960 Cx Instruction Set Quick Reference S-809 8448H 80960HD
Contextual Info: 80960HA/HD/HT SPECIFICATION UPDATE Release Date: July, 1996 Order Number 272830-001 The 80960HA/HD/HT may contain design defects or errors known as errata. Characterized errata that may cause the 80960HA/HD/HT’s behavior to deviate from published specifications

HTR resistors

Abstract: 80960 80960SA reference i960 RP Processor 80960JF STT 433 1250H clock generator in dual core processor i960 Cx Instruction Set Quick Reference i960 Cx Processor Instruction Set Quick Reference
Contextual Info: i960 RP Microprocessor User’s Manual i960® RP Microprocessor User’s Manual February 1996 Order Number: 272736-001 Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for

80960

Abstract: BO 620 bbc timer stt 11 c17f i960 Cx Processor Instruction Set Quick Reference i960RP 80960JF 80960RD 80960RP MA11
Contextual Info: i960 Rx I/O Microprocessor Developer’s Manual Release Date: April, 1997 Order Number: 272736-002 The i960® Rx I/O Processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Such errata are

SE-B3

Contextual Info: AP-703 i l î t è l APPLICATION NOTE DRAM Controller for 33 MHz i960 CA/CF Microprocessors February 2, 1995 I Order Number: 272627-001 1-459 AP-506 REVISION HISTORY Changes from Rev 001 to Rev 002 include: Section Description AC TIMING Two paragraphs added after the first:

intel i960 batch MARKING

Abstract: G960 I960 marking R810 80960
Contextual Info: i960 Processor Assembler User's Guide Order Number: 485276-006 Revision Revision History Date -001 Original Issue. 12/92 -002 Minor corrections. 09/93 -003 Revised for CTOOLS960 R4.5 and GNU/960 Tools R2.4. 05/94 -004 Revised for Release 5.0. 02/96 -005

BG 616

Abstract: processor cross reference D-10 D-12 D-16 D-18 D-19 5252 F 1118 intel i960 RISC nsp 1337
Contextual Info: i960 Jx Microprocessor Developer’s Manual Release Date: December, 1997 Order Number: 272483-002 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of