80960KB Search Results

ta80960kb

Abstract: LADI 12V VAX-11
Contextual Info: 80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING POINT UNIT • High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped

TA80960kb

Abstract: NG80960KB-25 80960KA 80960KB 80960MC
Contextual Info: 80960KB 80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT • High-Performance Embedded ■ Built-in Interrupt Controller Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ 512-Byte On-Chip Instruction Cache

VAX-11

Abstract: MIPS embedded RRU 32
Contextual Info: intj 80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT • High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped

TA80960KB

Abstract: LAD1 5V Intel 80960kb programmers reference 80960KA 80960KB 80960MC Intel 80960kb
Contextual Info: 80960KB 80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT • High-Performance Embedded ■ Built-in Interrupt Controller Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ 512-Byte On-Chip Instruction Cache

Contextual Info: 80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING POINT UNIT • High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ Built-In Interrupt Controller — 31 Priority Levels, 256 Vectors

TA80960KB

Abstract: 2T818 tl741
Contextual Info: intJ 80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT • High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped

TA80960KB

Abstract: 80960KA 80960KB 80960MC LAD1 12v
Contextual Info: 80960KB 80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT • High-Performance Embedded ■ Built-in Interrupt Controller Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ 512-Byte On-Chip Instruction Cache

Contextual Info: 80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING POINT UNIT High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz Built-In Interrupt Controller — 31 Priority Levels, 256 Vectors

LA07

Contextual Info: 80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING POINT UNIT • High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped

TA80960KB

Abstract: ADS-132 80960KA 80960KB 80960MC LAD26
Contextual Info: 80960KB EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT • High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped

80960KB

Abstract: 80960KB reference
Contextual Info: 80960KB Hardware DesignerÕs Reference Manual Order Number: 270564-002

Contextual Info: ¡n tg l. 82596CA HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR • Performs Complete CSMA/CD Medium Access Control MAC Functions— Independently of CPU — IEEE 802.3 (EOC) Frame Delimiting — HDLC Frame Delimiting ■ Supports Industry Standard LANs

micro instruction set of I960 hx

Abstract: 80960CA 80960CF 80960HA 80960HD 80960HT 80960JA Intel i960
Contextual Info: Intel i960® Processors i960® Architecture Family Product Highlights • 32-bit register-based RISC core in all processors ■ Code compatibility across entire product line ■ Broad selection of price and performance levels ■ Ideal for networking and imaging

80960KA

Abstract: 80960KB 80960MC 270775
Contextual Info: 80960KA EMBEDDED 32-BIT MICROPROCESSOR • High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped — Parallel Load/Decode for Uncached Instructions

I487

Abstract: a23 837-1 80960CA 82586 10BASE2 10BASE5 80960KB 82596CA multi 9 c6 dpn
Contextual Info: 82596CA HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR Y Performs Complete CSMA CD Medium Access Control MAC Functions Independently of CPU IEEE 802 3 (EOC) Frame Delimiting Y Y Y Y Supports Industry Standard LANs IEEE TYPE 10BASE-T IEEE TYPE 10BASE5 (Ethernet )

IN1016

Abstract: 80960HA 80960HD 80960HT 80960JA 80960JD 80960JF 80960JT PQFP 128 Fast Ethernet Risc
Contextual Info: i960 JA/JF/JD/JT Microprocessors PRODUCT HIGHLIGHTS • Low Power Modes ■ Improved cache design ■ State of the art testability ® ■ i960 processor compatible RISC core ■ 100 MIPS execution for the JT-100 ■ 16-Kbyte 2-way set associative instruction

cc196

Abstract: A-31 IEEE-695 ctools960 i960KB 80960KB Programmer Reference manual i960HA ASM96
Contextual Info:  i960 Processor Software Utilities User’s Guide Order Number: 485277-005 Revision Revision History Date -001 Original Issue. 12/92 -002 Minor corrections. 09/93 -003 Revised for CTOOLS960 R4.5 and GNU/960 R2.4. 05/94 -004 Revised for R5.0. 02/96 -005

80960CF

Abstract: 80960JA 80960CA 80960HA 80960HT 80960JD 80960JF 80960KA 80960SA 80960SB
Contextual Info: SOFTWARE DEVELOPMENT TOOLS CYGNUS Cygnus Developers Kit for the i960 Processor Family • ■ ■ ■ ■ ■ ■ ■ ■ ■ ANSI Conformant GNU C CompilerGCC GNU C+ Compiler - G+ Windowing, Source Level GNU Debugger - GDB Graphical User Interface for GDB

80960CA

Abstract: 80960CF 80960HA 80960HD 80960JA 80960JD 80960JF 80960KA 80960KB 80960SA
Contextual Info: i960 MICROPROCESSOR BENCHMARK REPORT Order Number: 272950-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in

a4490

Abstract: 80960MC A80960MC25 i960 mc errata 80960KA 80960KB M8259A intel packaging handbook 240800
Contextual Info: 80960MC EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT AND MEMORY MANAGEMENT UNIT Commercial • High-Performance Embedded Architecture — 25 MIPS Burst Execution at 25 MHz — 9.4 MIPS* Sustained Execution at 25 MHz ■ On-Chip Floating Point Unit

sun hold RAS 0610

Abstract: eeprom programmer schematic 24c08 80960KB Programmer Reference manual 270929 KDS crystal 20.000 zilog 4202 IC 24c08 PCI cyclone 3 schematics KDS 4.000 Crystal cpu 80960kx
Contextual Info: i960 Microprocessor User’s Guide for Cyclone and PCI-SDK Evaluation Platforms April 1996 Order Number: 272577-002 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

automatic room power control circuit block diagram

Abstract: 80960 80960KB Programmer Reference manual 8-BIT INTELLIGENT CONTROLLER UNIT ICU Three Timer E-NAND tag 8610 stt 7000 NMOS F12 diode I-35 L Diode IR 1254
Contextual Info: i960 Jx Microprocessor User’s Manual September 1994 Order Number: 272483-001 Intel Corporation makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in this document nor does it make a commitment to update the information contained herein.

transistor manual substitution FREE DOWNLOAD

Abstract: transistor manual substitution gcu 101 setting manual ALL TYPE IC DATA AND manual substitution BOOK Transistor Substitution Data Book 1993 i960 KA/KB Reference Manual 80960KB Programmer Reference manual BP 43 substitution i960 KA/KB Programmers Reference Manual GCC960
Contextual Info: i960 Processor Compiler User’s Manual Order Number: 651230-004 Revision Revision History Date 001 Initial Release 02/96 002 Revised for release 5.1 01/97 003 Revised for release 6.0 12/97 004 Revised for release 6.5 12/98 In the United States, additional copies of this manual or other Intel literature may be obtained by writing:

Intel 486 DX

Abstract: 486TMsX 82599
Contextual Info: 82596CA HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR • Perform s Com plete C S M A /C D Medium A ccess Control MAC Functions— Independently of CPU — IEEE 802.3 (EOC) Fram e Delimiting ■ Supports Industry Standard LANs — IEEE TYPE 10BASE-T,