7C51 Search Results

AS7C31024-12TC

Abstract: AS7C1024-15TJC
Contextual Info:  $6& $6& .ð&02665$0 &RPPRQ,2 IDPLO\ HDWXUHV • TTL/LVTTL-compatible, three-state I/O • 32-pin JEDEC standard packages - 300 mil PDIP and SOJ Socket compatible with 7C512 64Kx8) - 400 mil SOJ - 8mm × 20mm TSOP • ESD protection ≥ 2000 volts

Contextual Info: PRELIMINARY 131,072 W ORDS X 8 BIT CMOS PSEUDO STATIC RAM DESCRIPTION The 7C518129A-LV Family is a 1M bit high speed CMOS Pseudo Static RAM organized as 131,072 words by 8 bits. The TC518129A-LV Family utilizing one transistor dynamic memory cel! with CMOS

AS7C1024-15TJC

Abstract: AS7C1024L-20JC AS7C31024-12TC AS7C1024-10JC
Contextual Info:  $6& $6&/ $6& $6&/ .ð&02665$0 &RPPRQ,2 IDPLO\ HDWXUHV • TTL/LVTTL-compatible, three-state I/O • 32-pin JEDEC standard packages - 300 mil PDIP and SOJ Socket compatible with 7C512 64Kx8) - 400 mil SOJ - 8mm × 20mm TSOP

Contextual Info:  $6& $6&/ $6& $6&/ .ð&02665$0 &RPPRQ,2 IDPLO\ HDWXUHV • TTL/LVTTL-compatible, three-state I/O • 32-pin JEDEC standard packages - 300 mil PDIP and SOJ Socket compatible with 7C512 64Kx8) - 400 mil SOJ - 8mm × 20mm TSOP

7C1024

Contextual Info:  $6& 9.ð&02665$0 &RPPRQ,2 HDWXUHV • TTL-compatible, three-state I/O • 28-pin JEDEC standard packages - 300 mil PDIP and SOJ Socket compatible with 7C512 and 7C1024 - 8x13.4 TSOP • ESD protection ≥ 2000 volts • Latch-up current ≥ 200 mA

Contextual Info: High Performance 128Kx8 C M O S SRAM p i AS7C1024 AS7C1024L 128Kx8 CM O S S RAM Common I/O FEATURES • Organization: 131,072 words x 8 bits • Equal access and cycle times • High speed • Easy memory expansion with CE1, CE2, OE inputs - 10/12/15/20/25/35 ns address access time

Contextual Info: 7C516 7C517 CYPRESS SEMICONDUCTOR • Features • Fast — 38-ns clock cycle commercial 16 x 16 Multipliers b e independently specified as e ith e r tw o’s com plem ent o r unsigned m agnitude num ­ bers. C ontrols a re provided fo r rounding a nd form at adjustm ent o f the full-precision 32-bit product.

Contextual Info: H ig h P erform a n ce 32 K X 16 CMOS SRAM A S7C 513 A S 7 C 3 5 13 3 2 K x 16 CMOS SRAM • T T L - c o m p a tib le , th r e e - s ta te I / O • H ig h s p e e d • 4 4 - p i n JEDEC s ta n d a r d p a c k a g e - 4 0 0 m i l SO J - 1 0 / 1 2 / 1 S / 2 0 n s a d d r e s s a c c e ss tim e

Contextual Info: High Performance 32Kx8 CMOS SRAM p i AS7C256 AS7C256L 32Kx8 CMOS SRAM Common I/O FEATURES • Organization: 32,768 words x 8 bits Equal access and cycle times • High speed Easy memory expansion with CE and OE inputs - 10/12/15/20/25/35 ns address access time

7C1024

Abstract: AS7C256
Contextual Info: AS7C256 5V 32K •8 CMOS SRAAA /Common I OV Features • O rganization: 3 2 ,7 6 8 w ords X 8 bits • H igh speed - 1 0 /1 2 /1 5 / 2 0 ns address access tim e - 3 / 3 / 4 / 5 ns o utput enable access tim e • Low pow er consum ption - Active: 660 m W m ax 10 ns cycle

Contextual Info: H ig h P erfo rm a n ce 32K X8 CMOS SRAM AS7C.256 AS7C 256L A 32KX8 CMOS SRAM Common I/O • Organization: 32,768 words x 8 bits •H ig h sp eed - 1 0 /1 2 /1 5 /2 0 /2 5 /3 5 ns address access time - 3 / 3 / 4 / 5 / 6 /8 ns output enable access time • Low power consumption

Contextual Info: High Performance 128KX8 CMOS SRAM AS7C1024 AS7C31024 128KX8 CMOS SRAM Features • Organization: 131,072 words x 8 bits • High speed - 1 0 / 1 2 / 1 5 / 2 0 / 2 5 ns address access time - 3 / 3 / 4 / 5 / 6 ns output enable access time • Low power consumption

8C710

Abstract: 7111-C
Contextual Info: 1 1 1 1 1 1 1 234562781 1 1 1 1 AEF8C812 58 9 9 9 ABCDE9759F7E9 9

AS7C512-20JC

Abstract: AS7C512-15pc AS7C512 10n12 AS7C512-12JC 7C256 AS7C512L AS7CS12 Static Random Access Memory SRAM 7CS12-20
Contextual Info: High-Performance p i 7C512 : 7C512L CMOS SRAM 64Kx8 CMOS SRAM Common I/O FEATURES Organization; 65,536 words x 8 bits Equal access and cycle times High speed Easy memory expansion with CE1, CE2, OE inputs - 12/15/20/25/35 ns address access time TTL-compatible, three-state I/O

CY7C516

Abstract: 2N219
Contextual Info: 7C516 7C517 P V P P T 7 Ç C SEMICONDUCTOR Features • • 16 x 16 bit p arallel m u ltip lica tio n w ith fu ll p recision 32 -b it product ou tpu t • TVo’s com p lem en t, u n sig n ed m a g n i­ tu de, o r m ixed -m od e m u ltip lica tio n •

Contextual Info: 7C510 7 CYPRESS SEMICONDUCTOR • Fast — C Y 7 C 5 I0 —45 h a s a 4 5 -n s m ax. clock cycle (com m ercial) — C Y 7C 510—55 h as a 5 5-n s (m ax.) clock cycle (m ilitary) • Low power • 16 x 16 bit p arallel m u ltip lica tio n w ith accum u lation to 3 5 -b it resu lt

CY7C517

Abstract: CY7C516-55GC
Contextual Info: 7C516 7C517 CYPRESS SEMICONDUCTOR 16 x 16 Multipliers Features • Fast — 38 ns clock cycle commercial — 42 ns clock cycle (military) • Low Power — Ice (max. at 10 MHz) = 100 mA (commercial) — Ice (max. at 10 MHz) = 110 mA (military) • V’c c Margin

f1f9

Contextual Info: 123456781 12345674869AB4C9DEFB469F46649B47941 9ABCADEFEADE A 6 !"#34678"E$%&&&%444%9' (6) !"#346783E$%&&&%444%9' (6) !"#34678"E$%&&&%444%9# (6) !"#346783E$%&&&%444%9# CCAACBC (5) "1(%D4*$115+4*$)1 31(%D4*$1156+*$)

Contextual Info: H i ” h Pi i f o r n i . i i H i BB \S7C2S6 A Ì Z K '- “ iZ K x8 M O S SRAM ü \S7C2S6I 2 K X K (’M O S S R A M (Corninoli J / 0 ) • Easy m em ory expansion w ith CE and OE inputs • TTL-compatible, three-state I/O • 28-pin JEDEC standard packages

Contextual Info: High Performance 64KX8 CMOS SRAM 7C512 7C512L 64KX8 CMOS SRAM Features • Organization: 6 5 ,5 3 6 w ords x 8 bits • H igh speed - 1 2 / 1 5 / 2 0 / 2 5 / 3 5 ns address access time - 3 / 4 / S / 6 / 8 ns output enable access tim e • Low pow er consum ption

AS7C256

Abstract: 256x128x8 TI 344C
Contextual Info: High Performance 32Kx8 CMOS SRAM II ^ L lh . AS7C256 AS7C256L 32Kx8 CMOS SRAM Common I/O FEATURES • Organization: 32,768 words x 8 bits • Equal access and cycle times • High speed • Easy memory expansion with CE and OE inputs - 10/12/15/20/25/35 ns address access time

Contextual Info:  $6& $6& 99.ð&02665$0 HDWXUHV • TTL-compatible, three-state I/O • 44-pin JEDEC standard package - 400 mil SOJ - 400 mil TSOP II • Upward compatibility - 64Kx16 AS7C1026) - 256K×16 (AS7C4098) • Center power and ground pins

CY7C516

Abstract: LSP3130 CY7C517 7c516 CY7C516-75DMB 7C516-42 MPY016H CY7C516-38JC CY7C517-38GC CY7C516-55PC
Contextual Info: 7C516 7C517 CYPRESS SEMICONDUCTOR 16 x 16 Multipliers b e independently specified as eith e r tw o’s com plem ent o r unsigned m agnitude num ­ bers. C ontrols a re provided fo r rounding a nd fo rm at adjustm ent o f the full-precision 32-bit product.

Contextual Info: 1 1111111111111 111111 1 1111111111111 1 1111111111111 1 1111111111111 1 1 8123456788896AB78CDEDFD8C 8 888 8 88888888 88 88888888 8 8 D8F 888 88FF8C8CDC88F D!8D89"#8F  9DEB3$8%8&' 3 %*+8&'($8,26-8,C$8FF8 )%8DDEDC