256X128X8 Search Results

256x128x8

Abstract: cs107
Contextual Info: For Space Applications C M O S 3 2 k x 8 b it Static RAM MEMORY ARRAY INPUT COLUMN I/O 256x128x8 4-0 Yx «-0 GND *¿> ELECTRONICS INCORPORATED Tel: 619 452-4167 Fax: (619) 452-5499 INTERNET: 102005.1635@COMPUSERVE.COM 68 ^ 0 1 1 2 4 1 QOOOObR 020 MICROCIRCUIT

4430B

Abstract: 256x128x8
Contextual Info: |Ordering number : EN4430B] CMOS LSI LC33832P, S, M, PL, SL, ML-70/80/10 No. 4430B 256 K 32768 words x 8 bits Pseudo-SRAM Overview Package Dimensions The LC33832 series is composed of pseudo static RAM that operates on a single S V power supply and is organized as 32768 words x 8 bits. By using memory

Contextual Info: High Performance 32KX83.3Y CMOS SRAM •■ II AS7C3256 AS7G3256L L ow v o ltage 3 2 K x 8 C M O S SR A M Features • • • • O rganization: 32,7 6 8 w o rd s x 8 bits Single 3.3 ± 0.3V p o w e r supply 5V tolerant I /O specification H igh speed - 1 0 / 1 2 / 1 5 / 2 0 ns address access tim e

Contextual Info: High Performance 32Kx8 CMOS SRAM p i AS7C256 AS7C256L 32Kx8 CMOS SRAM Common I/O FEATURES • Organization: 32,768 words x 8 bits Equal access and cycle times • High speed Easy memory expansion with CE and OE inputs - 10/12/15/20/25/35 ns address access time

Contextual Info: H ig h P e r f o r m a n c e 32KX8 C M O S SR A M H A S7C 256 A 32K X 8 CMOS SRAM C om m on I / O Features • Organization: 32,768 words x 8 bits • High speed - 1 0 /1 2 /1 S /2 0 ns address access time - 3/ 3 / 4 / S ns output enable access time • Low power consumption

TC55257

Abstract: tc51832fl-10 tc51832fl 128X8 A12C TC51832 TC51832F TC51832P TC51832PL-10 TC51832SPL-10
Contextual Info: ,_ J TOS H IB A : _ L O G I C / M E M O R Y 4SE D • llg r iHii ^0^7246 D025D11 32,768 WORD x 8 BIT CMOS PSEUDO STATIC RAM □ ■TOSS* - - iDESCRIPTIONl The TC51832 Family is a 256K bit high-speed CMOS Pseudo-Static RAM organized as 32,768

7C3256

Contextual Info: # $6:&6589 6169#65.ð;#&026#65$0 HDWXUHV • Easy memory expansion with CE and OE inputs • TTL-compatible, three-state I/O • Ideal for cache, modem, portable computing - 75% power reduction during CPU idle mode • 28-pin JEDEC standard packages - 300 mil PDIP and SOJ

"32K x 8" SRAM dil

Abstract: 256X128X8 M65656 M65656G
Contextual Info: Temic M65656G Semiconductors 32 K x 8 Very Low Power CMOS SRAM Rad Tolerant Introduction The M65656G is a very low power CMOS static RAM organized as 32768 x 8 bits. TEMIC brings the solution for applications where fast computing is as mandatory as low consumption, such as

TC51832A

Abstract: 256X128X8 TC51832AP 1832A
Contextual Info: TOSHIBA TC51832AP/ASP/AF-70/85/10 TC51832APL/ASPL/AFL-70/85/10 SILICON GATE CMOS 32,768 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description The T C 5 1832 A P is a 2 5 6 K bit high speed C M O S p se udo static RAM organized as 3 2 ,7 6 8 w o rd s by 8 bits. The TC 51832A P utilizes

Contextual Info: H i ” h Pi i f o r n i . i i H i BB \S7C2S6 A Ì Z K '- “ iZ K x8 M O S SRAM ü \S7C2S6I 2 K X K (’M O S S R A M (Corninoli J / 0 ) • Easy m em ory expansion w ith CE and OE inputs • TTL-compatible, three-state I/O • 28-pin JEDEC standard packages

6A14

Abstract: TSOP8
Contextual Info: Features • Organization: 32,768 words x 8 bits • Single 3.3 ± 0.3V power supply • High speed - 12 / 1 5 /2 0 ns address access time - 3 /4 /5 ns output enable access time • Very low power consumption - Active: 198 mW max, 12 ns cycle - Standby: 3.6 mW max, CMOS I/O

AS7C256

Abstract: 256x128x8 TI 344C
Contextual Info: High Performance 32Kx8 CMOS SRAM II ^ L lh . AS7C256 AS7C256L 32Kx8 CMOS SRAM Common I/O FEATURES • Organization: 32,768 words x 8 bits • Equal access and cycle times • High speed • Easy memory expansion with CE and OE inputs - 10/12/15/20/25/35 ns address access time

AS7C256-15PC

Abstract: TSOP 8x14 AS7C256-20JC AS7C256-20PC 32KX8 7C256-15 8X13 AS7C256-10JC AS7C256-12PC 7C512
Contextual Info: H ig h P e r fo r m a n c e 32K X 8 C M O S SR A M _ I I A S 7 C 2 56 3 2 K x 8 C M O S SR A M C o m m o n I / O Features • O r g a n iz a tio n : 3 2 ,7 6 8 w o r d s x 8 b its • H ig h s p e e d • T T L -c o m p a tib le , th re e-sta te I / O

Contextual Info: AS7C3256 3.3V 32Kx8 CMOS SRAM Features • Easy memory expansion with CE and OE inputs • TTL-compatible, three-state I/O • Ideal for cache, modem, portable computing - 75% power reduction during CPU idle mode • 28-pin JEDEC standard packages - 300 mil PDIP commercial

did a2 198

Abstract: AS7C3256-15PC
Contextual Info: AS7C3256 3.3V 32Kx8 CMOS SRAM Features • Easy memory expansion with CE and OE inputs • TTL-compatible, three-state I/O • Ideal for cache, modem, portable computing - 75% power reduction during CPU idle mode • 28-pin JEDEC standard packages - 300 mil PDIP commercial

AS7C256-20JC

Abstract: AS7C256 taa 723 7C256-10 7C256-12 7C256-15 AS7C256L AS7C256-15PC 7C1024
Contextual Info: High Performance 32Kx8 CMOS SRAM AS7C256 AS7C256L 32K×8 CMOS SRAM Common I/O FEATURES • Organization: 32,768 words × 8 bits • Equal access and cycle times • High speed • Easy memory expansion with CE and OE inputs – 10/12/15/20/25/35 ns address access time

32kx8 sram

Contextual Info: High Performance 32KX8 3.3V CMOS SRAM « II AS7C32S6 AS7C3256L « Low voltage 32Kx8 CMOS SRAM Features • O rganization: 3 2 ,7 6 8 w o rd s x 8 bits • Equal access and cycle tim es • Single 3 .3 ± 0.3V p o w e r su pp ly • Easy m em o ry ex p a n sio n w ith CE and OE in pu ts

32KX8

Abstract: 8X13 AS7C3256 256x128x8
Contextual Info: H ig h Perform ance 32KX8 3.3V « AS7C32S6 AS7C3256L II CMOS SRAM X Low voltage 3 2 K x 8 CMOS SRAM Features • • • • Organization: 3 2 ,7 6 8 w ords x 8 bits Single 3.3 ± 0.3V pow er supply 5V tolerant I/O specification High speed - 1 0 / 1 2 / 1 5 / 2 0 ns address access time

TC51832

Abstract: TC51832APL TC51832A TC51832AP 256k sram cmos tc51832af
Contextual Info: TOSHIBA TC51832AP/ASP/AF-70/85/10 TC51832APIVASPL/AFLt70/85/10 SILICON GATE CMOS 32,768 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description The TC51832AP is a 256K bit high speed CMOS pseudo static RAM organized as 32,768 words by 8 bits. The TC51832AP utilizes

Contextual Info: TOSHIBA LOGIC/MEMORY 4flE D T G ^ E M ñ Q G 5 5 3 7 0 b T G 5 5 Ì3 2 8 P / v J - l^ T C 0 32,768 W O RD x 8 BIT BiCMOS STATIC RAM PRELIM INARY ‘ DESCRIPTION The TC55B328P/J is a 262,144 bits high speed static random access memory organized as 32,768 words

Contextual Info: H!gh Performance 32KxS 3.3V CMOS SRAM p i AS7C3256 AS7C3256L Low Voltage 32Kx8 CMOS SRAM Common I/O FEATURES • Organization: 32,768 words x 8 bits • Equal access and cycle times • Single 3.3 ±0.3V power supply • Easy memory expansion with CE and OE inputs

Contextual Info: INTEGRATED CIRCUIT TOSHIBA TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT TC55V328J - 2 0 , TC55V328J - 25. T C 5 5 V 3 2 8 J -3 5 TECHNICAL DATA SILICON GATE CMOS PRELIMINARY 32 ,7 68 W O R D x 8 BIT CM OS STATIC RAM DESCRIPTION The TC55V328J is a 262,144 bits high speed static random access memory organized as 32,768 words

7C1024

Contextual Info:  $6& 9.ð&02665$0 &RPPRQ,2 HDWXUHV • TTL-compatible, three-state I/O • 28-pin JEDEC standard packages - 300 mil PDIP and SOJ Socket compatible with 7C512 and 7C1024 - 8x13.4 TSOP • ESD protection ≥ 2000 volts • Latch-up current ≥ 200 mA

28-pin SOJ SRAM

Abstract: 32K8 AS7C3256-12JC AS7C3256L ci 741 AS7C3256-20JC AS7C3256 AS7C3256-10JC AS7C3256-10PC
Contextual Info: High Performance 32Kx8 3.3V CMOS SRAM AS7C3256 AS7C3256L Low voltage 32K×8 CMOS SRAM Features • Organization: 32,768 words × 8 bits • Single 3.3 ± 0.3V power supply • 5V tolerant I/O specification • High speed - 10/12/15/20 ns address access time