7C341 Search Results

CY7C341

Abstract: CY7C341B ic 7400 ttl
Contextual Info: 7c341: October 19, 1995 This is an abbreviated data sheet. Contact a Cypress Representative for complete specificaĆ tions. For new designs please refer to the 7C341 7C341B. 192ĆMacrocell MAXR EPLD macrocells, there are 32 single product term logic expanders in each LAB. Their use

7C341

Abstract: CY7C341B
Contextual Info: 7c341: 5/28/90 Revision: October 19, 1995 7C341B 192ĆMacrocell MAX R EPLD logic expanders in each LAB. Their use mentation, often in a single pass, without greatly enhances the capability of the maĆ the multiple internal logic placement and crocells without increasing the number of routing iterations required for a programĆ

74151

Abstract: 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer
Contextual Info: 1CY 7C34 0 fax id: 6100 EPL D Family CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDS Features tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. • Erasable, user-configurable CMOS EPLDs capable of

84-PIN

Abstract: CY7C341B
Contextual Info: 7C341B y CYPRESS Features • 192 macrocells in 12 LABs • 8 dedicated inputs, 64 bidirectional I/O pin • Advanced 0.65-micron CMOS technology to increase performance • Programmable interconnect array • 384 expander product terms • Available in 84-pin HLCC, PLCC, and

C3402

Abstract: 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C CY7C340
Contextual Info: EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase

256K x 8 SRAM CY7C128A SRAM

Abstract: 5962-86705 PLD28 5962-89935 pld20ra10 5962-89598 CY7C132 cy7c291 PLD20RA PLDC20G10
Contextual Info: Military Product Selector Guide Static RAMs Size Organization Pins DIP SMD Number Part Number Speed (ns) ICC/ISB/ICCDR (mA @ ns) 883 Availability 1K 256 x 4 22 CY7C122 5962-88594 tAA = 25, 35 90 @ 25 Now 4K 1K x 4—Separate I/O 24S CY7C150 5962-88588 tAA = 25

c341 transistor

Abstract: 7C341 diode c341 CY7C341 84-PIN C341
Contextual Info: 41 7C341 192-Macrocell MAX EPLD Features • • • • • • 192 macrocells in 12 LABs 8 dedicated inputs, 64 bidirectional I/O pin 0.8-micron double-metal CMOS EPROM technology Programmable interconnect array 384 expander product terms Available in 84-pin HLCC, PLCC, and PGA packages

ATPA

Abstract: 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2147-35C CY7C147-35C CY7C147-45C CY7C147-35C CY91L22-35C CY7C122-35C CY2147-45C CY2147-35C CY7C148-35C CY7C148-25C+ CY91L22-45C CY93L422AC CY2147-45C CY7C147-45C CY7C148-45C CY7C148-35C

c3415

Abstract: cy7c341-30jc CY7C341
Contextual Info: 7C341 y CYPRESS Features • • • • • • 192 macrocells in 12 LABs 8 dedicated inputs, 64 bidirectional I/O pin 0.8-micron double-metal CMOS EPROM technology Programmable interconnect array 384 expander product terms Available in 84-pin HLCC, PLCC, and PGA packages

wl1251

Abstract: 464X1
Contextual Info: 7C341 PRELIMINARY r CYPRESS SEMICONDUCTOR 192-Macrocell MAX EPLD Features Logic A rray Blocks • 192 macrocells in 12 LABa T h e re are 12 logic array blocks in the 7C341. Each LAB consists o f a m acro ­ cell array containing 16 m acrocells, an ex­

81c78

Abstract: 7C291 5962-8515505RX 27PC256-12 PAL164A 8464C 5C6408 72018 39C10B MACH110 cross reference
Contextual Info: Product Line Cross Reference CYPRESS 2147-35C 2147-45C 2147-45C 2147-45M+ 2147-55C 2147-55M 2148-35C 2148-35C 2148-35M 2148-45C 2148-45C 2148-45M 2148-45M+ 2148-55C 2148-55C 2148-55M 2149-35C 2149-35C 2149-35M 2149-45C 2149-45M 2149-45M 2149-55C 2149-55C 2149-55M

MSM 6290

Abstract: msm 5562 27c256 intel 62c512 AP 2068 27C512 microchip 62256 57C256 27C512 SGS-THOMSON 27C512-150
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 2147-35C 27S07AC 7C190-25C 7C171A-35C 7C171A-25C 2147-45C 7C147-45C 27S07AM 7C190-25M 7C171A-45M 7C171A-35M+ 2147-45M+

pin configuration IC 74151

Abstract: IC 74151 diagram and truth table IC TTL 7400 diagram and truth table ic 74151 full adder using Multiplexer IC 74151 Multiplexer IC 74151 programmer manual EPLD cypress IC 7400 SERIES ALL DATA programming manual EPLD cy7c342
Contextual Info: CYPRESS SEMICONDUCTOR HOE D 256*^2 DD05427 5 ICYP 7 T V d -/3 -4 7 CY7C340 EPLD Family « 1 ^ CYPRESS SEMICONDUCTOR Multiple Array Matrix High-Density EPLDs Features General Description • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions

SRAM timing

Abstract: 303A16
Contextual Info: AT&T Advance Data Sheet November 1991 7C341 Microelectronics High-Speed CMOS 1 Mbit 128Kx9 SRAM Synchronous, Pipelined Architecture TTL Compatible Common I/O Features • High Speed —10 ns maximum access times ■ Registered addresses, data I/O, and control inputs

74151 PIN DIAGRAM

Abstract: 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C340 CY7C341B CY7C342B
Contextual Info: 40 EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase

Contextual Info: '0 CYPRESS Features • 192 m acrocells in 12 L A B s • 8 dedicated inputs, 64 bidirectional I/O pin • Advanced 0.65-micron CMOS technology to increase performance • Programmable interconnect array • 384 expander product terms • Available in 84-pin HLCC, PLCC, and

TYA 0298

Abstract: A934 transistor TDA 0470 65C02 20C600 65816 Microprocessor MOS 6502 65816 transistor a934 tda 1042
Contextual Info: Programming the 65816 Including the 6502, 65C02 and 65802 Distributed and published under COPYRIGHT LICENSE AND PUBLISHING AGREEMENT with Authors David Eyes and Ron Lichty EFFECTIVE APRIL 28, 1992 Copyright 2007 by The Western Design Center, Inc. 2166 E. Brown Rd. Mesa, AZ 85213

22V10-Macrocell

Abstract: 99522 PLD20RA10 22V10D 5962-89598 cy7c291 CY7C425 PALC22V10B CY6116A CY7C128A
Contextual Info: Military Product Selector Guide Static RAMs Size Organization Pins DIP SMD Number Part Number 16K 2K x 8—CS Power-Down 24S CY7C128A 16K 2K x 8—CS Power-Down 24 CY6116A 64K 8K x 8—CS Power-Down 28S CY7C185A 256K 32K x 8—CS Power-Down 28 CY7C198 256K

cy7c9101

Abstract: CY2901 CY7C190 PLD20RA10 CY2149 CY7C122 CY7C148 CY7C149 CY7C150 22V10-Macrocell
Contextual Info: Military Product Selector Guide Static RAMs Size Organization 64 64 1K 1K 4K 4K 4K 4K 4K 8K 8K 16K 16K 16K 16K 16K 16K 16K 16K 16K 32K 32K 32K 32K 32K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 64K 256K 256K 256K 256K 256K 256K 256K 1M 1M

84-PIN

Abstract: CY7C341 CY7C341B
Contextual Info: 7C341B ir CYPRESS . Features • 192 macrocells in 12 LABs • 8 dedicated inputs, 64 bidirectional I/O pin • Advanced 0.65-micron CMOS technology to increase performance • Programmable interconnect array • 384 expander product terms • Available in 84-pin HLCC, PLCC, and

Contextual Info: CY7C340 EPLD Family 0 CYPRESS Multiple Array Matrix High-Density EPLDs — VHDL simulation ViewSim Features • Erasable, user-configurable CMOS EPLDs capable o f implementing highdensity custom logic functions • 0.8-micron double-metal CMOS EPROM technology (CY7C34X)

PLD28

Abstract: 22V10-Macrocell 5962-86705 5962-89598 cy7c291 PLDC20G10 CY6116A CY7C128A CY7C168A CY7C185A
Contextual Info: Military Product Selector Guide Static RAMs Size Organization Pins DIP SMD Number Part Number Speed (ns) ICC/ISB/ICCDR (mA @ ns) Availability 16K 2K x 8—CS Power-Down 24S CY7C128A 5962-89690 tAA = 20, 25 125 @ 20 Now 16K 2K x 8—CS Power-Down 24S CY7C128A

84-PIN

Abstract: CY7C341B ULTRA37000
Contextual Info: USE ULTRA37000 FOR ALL NEW DESIGNS 7C341B 192-Macrocell MAX EPLD Features • 192 macrocells in 12 logic array blocks LABs • Eight dedicated inputs, 64 bidirectional I/O pins • Advanced 0.65-micron CMOS technology to increase performance • Programmable interconnect array

D741A

Abstract: AD3b
Contextual Info: 1 7 7 7 12324567589ABCBDE6F5856A354A3BAC636 $%&67'6 % !!6$*(76%+(*6',-+(7+(6.&66 F395536 7 FB825A36(5545A856,B/6170"""#66 -54BA6"!6 256F35/612")2"#6