74LS24 Search Results

Contextual Info: SN54LS242, SN54LS243, 74LS242, 74LS243 QUADRUPLE BUS TRANSCEIVERS APHIL 1985 —REVISED MARCH 198B • T w o -W a y Asynchronous C om m unication B etw een D ata Buses • P N P Inputs Reduce D -C Loading SN 54LS 242, SN 54LS 243 . . . J OR W PACKAGE SN 74LS 242. SN 74LS243 . . . D OR N PACKAGE

LS244

Abstract: applications of 74LS244 74LS244 LOGIC DESCRIPTION 74LS244 LS241 74LS244 20 pin of 74LS244 74ls244 as buffer
Contextual Info: Am25LS241 • Arr»54LS/74LS241 Am25LS244• Am54LS/74LS244 O c ta l T h re e -S ta te B uffers DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • • • • • • • • The 'LS241 and 'LS244 are octal buffers fabricated using advanced low-pow er Schottky technology. The 20-pin pack­

C243

Abstract: 54LS242DM 54LS242FM 54LS243DM 74LS242DC 74LS242FC 74LS242PC 74LS243DC 74LS243FC 74LS243PC
Contextual Info: 242 • 243 C O N N E C T IO N D IA G R A M S P IN O U T A 54LS/74LS242 54LS/74LS243 ouo,n^ QUAD BUS TRANSCEIVER W ith 3-State O utputs 1,(7 n c g n d ] 7 | Vcc [T h ] e2 œ T7|nc E HI Œ in E I] I] (T D E S C R IP T IO N — T he 'LS 242 a n d ’243 are quad bus tra n s m itte rs /re c e iv e rs

M74LS240P

Abstract: la 7610 d 667c
Contextual Info: M ITSUBISHI L S T T L s M 74LS240P OCTAL BUFFER/LINE DRIVERS WITH 3-STATE OUTPUTS INVERTED DESCRIPTION The M 74LS240P PIN CONFIGURATION (TOP VIEW) is a s e m ic o n d u c to r integrated c irc u it a n d c o m m o n o u tp u t c o n tro l in p u t f o r all 4 d iscrete c irc u its .

74LS244PC

Abstract: 74LS240PC 74LS244 CLS240 C244 74S240PC C240 54C244 74LS241 74S241
Contextual Info: 240 • 241 • 244 acL-ii y C O N N E C T IO N D IA G R A M S P IN O U T A '" / f H g r 4S/74S240 • 54LS /74LS 240 54S/74S241 • '54LS/74LS241 0 / c ^ c<V 54LS /74LS 244ÎX r> O C T A L B U F F ^ F fÀ J lÌ È Ì D R I V E R With 3-State Outputs P IN O U T B

bi 72

Abstract: BI 344
Contextual Info: PANASONIC INDL/ELEK -CIO 72 69 328 52 PANASONIC dËJ 1^33*52 □DQ717M 5 1 72C 0 7 1 7 4 I N D L * ELECTRONIC LS TTL DN74LSS>U—X D 74LS249/74LS249S - |- fr—* I I *-*J DN 74LS249/ DN 74LS249S B C D -to -7 -segment D ecorders/ D r iv e r s (with Open C ollector Outputs

DN74LS245

Abstract: MA161
Contextual Info: 74LS245 LS TTL DN74LS Series 74LS245 ro 74LS^4-S' O ctal Bus T r a n sc e iv e r s w ith 3 -sta te O u tp u ts • Description P-3 D N 74LS245 contains eight bus transm itter/receiver circuits with non-inverted outputs. ■ Features • • • • •

74LS245 application

Abstract: logic diagram of 74LS245 74ls245 74ls245 motorola TTL 5400 motorola SN54/74LS245 751d-03 SN54LSXXXJ SN74LSXXXN motorola TTL 5400
Contextual Info: SN54/74LS245 OCTAL BUS TRANSCEIVER The SN54 / 74LS245 is an Octal Bus Transmitter/Receiver designed for 8-line asynchronous 2-way data communication between data buses. Direction Input DR controls transmission of Data from bus A to bus B or bus B to bus A depending upon its logic level. The Enable input (E) can be used

74LS247

Abstract: 74LS248 74LS249 7-seg ANODE COMMON 74LS47 gate diagram transistor 6B D143 74LS49 9374 d141
Contextual Info: FAIRCHILD INTERFACE DISPLAY DRIVERS 7.0 55 L Gas Discharge 80 D140 4L.7B, 9B 2 54/ 74145 1-of-10 OC Dvr TTL Yes No Yes 80 15 L Common Anode 215 D135 4L.7B 9B 3 54LS/ 74LS247 7-Seg Decoder/Dvr TTL Yes Yes No 12 15 L LED, Com Anode 4 54LS/ 74LS248 7-Seg Decoder/Dvr

Contextual Info: 242 • 243 CO NNECTIO N DIAGRAMS PINOUT A '/54LS/74LS242 0 Lf ì> 54LS/74LS243 OtiLnU QUAD BUS TRANSCEIVER (With 3-State Outputs) 1,(7 ]7 |v c c n c [T g n d Î3]E2 î ï E 13 U 33 E H (T D ES C R IP TIO N — The 'LS242 and ’243 are quad bus transm itters/receivers

LS249

Abstract: LS49 74ls249
Contextual Info: 249 CO NNECTIO N DIAGRAM PINOUT A /M f r: 54LS/74LS249 BCD TO 7-SEGMENT DECODER 1— With O pen-Collector Outputs r T il a2 [T 751 r l t [T H la B i/R B Ö [7 751 a r b ì[£ Ï2 | b a3 TT| c (T To] a o [T g n d DESCRIPTION — The ’LS249 has active HIGH open-collector outputs and is

Contextual Info: LS TTL DN74LS Series 74LS245 74LS245 Octal Bus Transceivers with 3-state Outputs H Description P -3 D N 74LS245 contains eight bus transm itter/reciver circuits w ith non-inverted o utputs. • Features • B idirectional transfer or separation capability for tw o 8-bit

74LS243N

Abstract: 74LS242
Contextual Info: 74LS242, LS243, S242, S243 Signelics Transceivers '242 Quad Inverting Transceiver 3-State '243 Quad Transceiver (3-State) Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7 4LS 242 10ns 27m A 7 4LS 243 12ns 28m A

Contextual Info: | \ / | | aTB E5| ISO-CMOS Octal Bus Transceivers "I " with 3 -S ta te Buffered Outputs Technical Data M D54SCS45, M D 54SC 545 M D74SCE45, M D74SC545 OCT 1BS Features Ordering Information • Pin co m p a tib le w ith 54/74LS245 types MD54SCXXXAC MD74SCXXXAC

N8T125N

Abstract: 1N3064 74LS 74LS245 8T125 ttl buffer 74LS245 N8T125 74LS245 SIGNETICS
Contextual Info: Signetics 8T125 Transceiver Octal 3-State Transceiver Product Specification Logic Products FEATURES • • • • • Octal bidirectional bus interface 3-State buffer outputs PNP Inputs for reduced loading Hysteresis on all Data inputs Pin compatible with 74LS245

74LS240

Abstract: SP74SC240F SP74SC240N
Contextual Info: OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS PIN CO NFIGURATION FEATURES • Designed lor memory address drivers, clock drivers, and line drivers in bus-oriented systems ■ 3-state outputs for line drivers ■ Pin compatible with 74LS240 ■ SPI CMOS technology

74LS244 PIN CONFIGURATION AND SPECIFICATIONS

Abstract: 74LS244 uses and functions 74LS244 pin configuration 74LS244 74LS244 20 PINS 74LS244 PIN CONFIGURATION AND SPECIFICATIONS FOR 74LS244D LOGIC OF 74LS244 74L5244 74LS244 20 pin
Contextual Info: Signetics 74LS244, S244 Buffers Octal Buffers 3-State Product Specification Logic Products T Y P IC A L PR O P A G A TIO N D E LA Y TY PE T Y P IC A L SU PPLY C U R R E N T (T O T A L) 74LS 244 12ns 25m A 74S 244 6ns 112m A FUNCTION TABLE IN PU TS O Ea L

ttl buffer 74LS245

Abstract: 74LS245 application 1N3064 74LS245 G74SC245D G74SC245P
Contextual Info: G 74SC 245 H B Microcircuits C M O S Octal Bus Transceivers w ith 3-S ta te Buffered Outputs Features G en eral D escrip tio n • Pin c o m p a tib le w ith 74LS245 T h is o c ta l bus tra n s c e iv e r c irc u it is d e s ig n e d fo r h ig h -s p e e d

Contextual Info: Ä M O SN54/74LS240 SN54/74LS241 SN54/74LS244 T O R O L A DESCRIPTION — The SN54LS/74LS240, 241 and 244 are Octal Buffers and Line Drivers designed to be employed as memory address drivers, clock drivers and bus-oriented transmitters/receivers which

SN74LS

Abstract: LS244 SN54LS241 SN54LS244 SN54S240 SN54S241 SN74LS240 SN74LS241 SN74LS244 SN74S240
Contextual Info: TYPES S N 54L S 24 0 ,S N 54L S 241,S N 54L S 2 44,S N 54S 240,S N 54S 241, S N 74L S 240,SN 74LS241,SN 74LS244,SN 74S240.S N 74S241 OCTAL BUFFERS AND UNE DRIVERS W ITH 3-STATE OUTPUTS S N54LS ’ SN74LS&#39; SN54S&#39; Typical Typical •OL Sink ■o h (Source Current

Contextual Info: MITSUBISHI LSTTLs M 74LS245P OCTAL BUS TR A N SC EIVER S W IT H 3 -S T A T E O U TP U TS N O N IN V E R TE D DESCRIPTION The M 7 4L S 24 5P PIN CONFIGURATION (TOP VIEW) is a semiconductor integrated circuit containing o f 8 bus transm itter/receiver circuits w ith non­

74LS240PC

Abstract: 74ls244pc
Contextual Info: 240 /c c L ^ i y • 241 • 244 CO NNECTIO N DIAGRAMS PINOUT A r/o^i<r 54S/74S240 • 54LS/74LS240 +1S4S/74S241 • 54LS/74LS241 / r ' ?54LS /74LS 244// <~'>n h - OCTAL BUFF^r/ lT ^ e ' d RIVER With 3-State Outputs DESCRIPTION — The ’240, ’241 and ’244 are octal buffers and line drivers

Contextual Info: PANASONIC INDL/ELEK -CIO 72 6932852 PANASONIC dËJ I N D L * ELECTRONIC 1^33*52 □DQ717M 5 1 72C 0 7 1 7 4 LS TTL DN74LSS>U—X D 74LS249/74LS249S - |- fr—* I I *-*J DN 74LS249/ DN 74LS249S B C D -to -7 -segment D ecorders/ D r iv e r s (with Open C ollector Outputs

74LS245 buffer ic

Abstract: ic 74ls245 74LS245 74LS245 SIGNETICS 74LS245 interface function table of 74LS245 LS 74LS245
Contextual Info: Signetics 74 LS 2 45 Transceiver Octal Transceiver 3-State Product Specification Logic Products FEATURES • Octal bidirectional bus interface • 3-State buffer outputs TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 8ns 58 mA 74LS245 • PNP inputs for reduced loading