74AC74 FAIRCHILD Search Results

Contextual Info: [ /Title CD74 AC74, CD74 ACT74 /Subject (Dual DType FlipFlop with Set and Reset PositiveEdgeTriggered) /Autho r () /Keywords (Harris Semiconductor, Advan ced CMOS , Harris Semiconductor, Advan CD54/74AC74, CD54/74ACT74 Data sheet acquired from Harris Semiconductor

AC00

Abstract: AC74 ACT74 CD54AC74F3A CD74AC74E CD74AC74EX D112CP
Contextual Info: [ /Title CD74 AC74, CD74 ACT74 /Subject (Dual DType FlipFlop with Set and Reset PositiveEdgeTriggered) /Autho r () /Keywords (Harris Semiconductor, Advan ced CMOS , Harris Semiconductor, Advan CD54/74AC74, CD54/74ACT74 Data sheet acquired from Harris Semiconductor

Contextual Info: [ /Title CD74 AC74, CD74 ACT74 /Subject (Dual DType FlipFlop with Set and Reset PositiveEdgeTriggered) /Autho r () /Keywords (Harris Semiconductor, Advan ced CMOS , Harris Semiconductor, Advan CD54/74AC74, CD54/74ACT74 Data sheet acquired from Harris Semiconductor

74AC74PC

Abstract: 74AC74 74AC74MTC 74AC74SC 74AC74SJ 74ACT74 74ACT74SC 74ACT74SJ ACT74 33DN
Contextual Info: Revised November 1999 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Features The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the

act74

Abstract: AC74
Contextual Info: AC74 • ACT74 54AC/74AC74 • 54ACT/74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop Description Connection Diagrams The ’AC/’ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Ü outputs. Information at the

Contextual Info: Technical Dala CD54/74AC74 CD54/74ACT74 Dual D-type Flip-Flop with Set and Reset Positive-Edge-Triggered Type Features: • B uffered inputs a Typical propagation delay: 4.9 ns @ Vcc - 5 V, TA = 25° C, CL = 5 0 p F FUNCTIONAL DIAGRAM & TERMINAL ASSIGNMENT

Contextual Info: AC74 • ACT74 54AC/74AC74 • 54ACT/74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop Description Connection Diagrams The ’AC/’ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, C outputs. Information at the

ACT74

Contextual Info: AC74 • ACT74 54AC/74AC74 • 54ACT/74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop Connection Diagrams Description The ’AC/’ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, G outputs. Information at the

Contextual Info: Revised October 1998 j,f > i '' ^ : 3? •? » 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Asynchronous Inputs: The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.

74AC74

Contextual Info: s e m ic o n d u c t o r Revised November 1999 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Features The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.

74AC74

Abstract: 74AC74MTC 74AC74PC 74AC74SC 74AC74SJ 74ACT74 74ACT74SC 74ACT74SJ ACT74
Contextual Info: Revised October 1998 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Asynchronous Inputs: The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the

74AC74

Abstract: 74AC74MTC 74AC74MTCX 74AC74PC 74AC74SC 74AC74SJ 74ACT74 74ACT74SC ACT74
Contextual Info: Revised February 2005 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Features The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the

74AC74 Fairchild

Contextual Info: Revised August 1999 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Features The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the

74AC74

Abstract: 74AC74MTC 74AC74PC 74AC74SC 74AC74SJ 74ACT74 74ACT74SC 74ACT74SJ ACT74
Contextual Info: Revised December 1998 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Asynchronous Inputs: The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the

Contextual Info: 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description A synchronous Inputs: The A C /AC T74 is a dual D-type flip-flop with Asynchronous C lear and S e t inputs and com plem entary Q, Q outputs. Inform ation at the input is transferred to the outputs on the

74AC74

Abstract: 74AC74MTC 74AC74SC 74AC74SJ 74ACT74 ACT74 M14A M14D MTC14
Contextual Info: Revised N ovem ber 1999 S E M I C O N D U C T O R TM 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Features The A C /AC T74 is a dual D -type flip-flop w ith Asynchronous C lear and Set inputs and com plem entary Q, Q outputs.

74AC74

Abstract: 74AC74MTC 74AC74SC 74AC74SJ 74ACT74 ACT74 M14A M14D MTC14
Contextual Info: A S E I R M C H N ovem ber 1988 D • Revised D ecem kber iOQo 1998 I L D ¡C O N D U C T O R TM 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Asynchronous Inputs: T h e AC/ACT74 is a dual D-1ype flip-flop with Asynchronous

Contextual Info: Novem ber Revised D ecem ber 1998 S E M I C O N D U C T O R TM 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description A synchronous Inputs: T h e AC /AC T74 is a dual D-type flip-flop with Asynchronous C lear and S e t inputs and com plem entary Q, Q outputs.

74ACT74SC fairchild

Contextual Info: 74AC74, 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop Features General Description • ICC reduced by 50% The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is

74AC74

Abstract: rohs 74act74 fairchild 74AC74MTC 74AC74PC 74AC74SC 74AC74SJ 74ACT74 74ACT74SC 74ACT74SJ ACT74
Contextual Info: 74AC74, 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop Features General Description • ICC reduced by 50% The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is

74AC04N

Abstract: 74AC153N 74AC08N 74ac74n 74ac14 philips 74AC138N 74AC00N 74AC151N 74ac86N 74AC240N
Contextual Info: Standard Logic Thousands of new ICs are in the pipeline for addition and not shown below. Call us to see if you can save 10-20%. Package TI Jameco Fairchild On Semi ST Micro Philips Toshiba AC T DIP DIP SOIC SOIC SN74AC(T)XXXN CD74AC(T)XXXE SN74AC(T)XXXD/DW

transistor AC126

Abstract: equivalent transistor ac125 AC393 AC126 74AC393 AC365 AC682 d flip flop p6nk60z ACT03
Contextual Info: HC Portfolio Comparison PART # AC00 ACT00 AC01 AC02 ACT02 AC03 ACT03 AC04 ACT04 ACU04 AC05 ACT05 AC07 AC08 ACT08 AC09 AC10 ACT10 AC11 ACT11 AC14 ACT14 AC20 ACT20 AC32 ACT32 AC74 ACT74 AC86 ACT86 AC107 AC109 ACT109 AC112 ACT112 AC123 AC125 ACT125 AC126 ACT126

74act3301

Abstract: scl4412 75307 equivalent CD4015 jm38510/05101 DISCO DFG840 JM38510/33903BEA 74lvc3245 JM38510/05101BCA JM38510/34001BCA
Contextual Info: N ENHANCED SOLUTIONS DESIGN/PROCESS CHANGE NOTIFICATION formerly Military & Aerospace Division PCN Nr: 1999 Listing GIDEP Nr: GIDEP Category: Issued: 01/05/99 TRB Nr: This is to advise you that a Design and/or Process Change will be made to the following High Reliability product(s):

FQPF*7N65C APPLICATIONS

Abstract: bc548 spice model bf494 spice model spice model bf199 LM3171 BC517 spice model bc547 spice model BF494 spice MOC3043-M spice model SPICE model BC237
Contextual Info: Fairchild PSG.book Page i Wednesday, July 28, 2004 11:12 AM Fairchild Semiconductor Product Catalog Rev. 1 Analog & Mixed Signal Discrete Power Interface & Logic Microcontrollers Optoelectronics RF Power Front Matter.fm Page ii Monday, August 2, 2004 10:09 AM