74AC74 Search Results

74AC74

Abstract: 74AC74B 74AC74M 74AC74MTR 74AC74TTR TSSOP14
Contextual Info: 74AC74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 300MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING

Contextual Info: Novem ber Revised D ecem ber 1998 S E M I C O N D U C T O R TM 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description A synchronous Inputs: T h e AC /AC T74 is a dual D-type flip-flop with Asynchronous C lear and S e t inputs and com plem entary Q, Q outputs.

lm 4572 SMD 8 PIN

Contextual Info: February 1993 54AC/74AC74 • 54ACT/74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description The ’A C /’AC T74 is a dual D -type flip-flo p w ith A syn ch ro ­ nous C lear and Set inputs and com plem entary Q, Q o ut­ puts. Inform ation at th e input is transferred to th e o utputs on

74AC74

Abstract: SC0946 74AC74B AC74
Contextual Info: = 7 SGS-THOMSON k 7# R f f l D i S ^ l l l L [ l e T n ^ D S ! l D © S 74AC74 DUAL D-TYPE FLIP FLOP W ITH PR ESET AND CLEAR . HIGHSPEED: =300 MHz (TYP. at Vcc =5V LOW POWER DISSIPATION: Icc = 4 |xA (MAX.) at T a = 25 °C HIGH NOISE IMMUNITY: V n ih = V n il = 2 8 % V c c (MIN.)

Contextual Info: [ /Title CD74 AC74, CD74 ACT74 /Subject (Dual DType FlipFlop with Set and Reset PositiveEdgeTriggered) /Autho r () /Keywords (Harris Semiconductor, Advan ced CMOS , Harris Semiconductor, Advan CD54/74AC74, CD54/74ACT74 Data sheet acquired from Harris Semiconductor

74AC74

Abstract: 74AC74MTC 74AC74SC 74AC74SJ 74ACT74 ACT74 M14A M14D MTC14
Contextual Info: A S E I R M C H N ovem ber 1988 D • Revised D ecem kber iOQo 1998 I L D ¡C O N D U C T O R TM 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Asynchronous Inputs: T h e AC/ACT74 is a dual D-1ype flip-flop with Asynchronous

Contextual Info: Semiconductor 54AC/74AC74 • 54ACT/74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description The 'A C /’ACT74 is a dual D-type flip-flop with Asynchro­ nous Clear and Set inputs and complementary Q, Q out­ puts. Information at the input is transferred to the outputs on

74AC74

Abstract: 74AC74B 74AC74M AC74
Contextual Info: 74AC74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 300 MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING

smd AC74

Abstract: national 74act74 54ACT 74AC 74AC74 74ACT74 AC74 ACT74 C1995 B50 diode smd
Contextual Info: 54AC 74AC74  54ACT 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description The ’AC ’ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q Q outputs Information at the input is transferred to the outputs on

74AC74

Abstract: AC74 74AC74B 74AC74M 74AC74MTR 74AC74TTR
Contextual Info: 74AC74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 300MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING

Contextual Info: Technical Data CD54/74AC74 CD54/74ACT74 Dual D-type Flip-Flop with Set and Reset Positive-Edge-Triggered Type Features: • B uffered inputs m Typical propagation delay: 4.9 ns @ l/cc = 5 V, TA = 25° C, C l = 50 pF FUNCTIONAL DIAGRAM & TERMINAL ASSIGNMENT

74AC74

Abstract: 74AC74B 74AC74M 74AC74MTR 74AC74TTR TSSOP14
Contextual Info: 74AC74 DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 300MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING

3vf5

Contextual Info: Technical D a ta _ _ m - Hi 3D54/74AC74 DD54/74ACT74 IAXIMUM RATINGS, A bsolute-M axim um Values: >C SUPPLY-VOLTAGE Vcc .-0.5 to 6 V

74AC74PC

Abstract: 74AC74 74AC74MTC 74AC74SC 74AC74SJ 74ACT74 74ACT74SC 74ACT74SJ ACT74 33DN
Contextual Info: Revised November 1999 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Features The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the

Contextual Info: [ /Title CD74 AC74, CD74 ACT74 /Subject (Dual DType FlipFlop with Set and Reset PositiveEdgeTriggered) /Autho r () /Keywords (Harris Semiconductor, Advan ced CMOS , Harris Semiconductor, Advan CD54/74AC74, CD54/74ACT74 Data sheet acquired from Harris Semiconductor

LM358 vs LM741

Abstract: LM607CN LM324 vs LM741 LM337 TO-92 L308A L1117-3.3 LM2980 LM741 vs. LM324 m6 sot-23 pinout datasheet of IC 74LS90
Contextual Info: National Semiconductor to Texas Instruments Cross-Reference National Semiconductor GPN 74AC74 74AC74 74ACT00 74ACT374 74ACT374 74ACT374 74ACT374 74ACT374 74ACT374 74ACT374 74ACT374 74ACT74 74ACT74 74F109 74F109 74F151A 74F151A 74F151A 74F153 74F153 74F153

ACT74

Abstract: 54ACT 74AC
Contextual Info: AC74 • ACT74 54AC/74AC74 • 54ACT/74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop Description Connection Diagrams The ’AC/’ACT74 is a duat D-type flip -flo p w ith A synchronous C lear and Set in pu ts and com plem entary Q, Ü ou tputs. Inform a tion at the

AC00

Abstract: AC74 ACT74 CD54AC74F3A CD74AC74E CD74AC74EX D112CP
Contextual Info: [ /Title CD74 AC74, CD74 ACT74 /Subject (Dual DType FlipFlop with Set and Reset PositiveEdgeTriggered) /Autho r () /Keywords (Harris Semiconductor, Advan ced CMOS , Harris Semiconductor, Advan CD54/74AC74, CD54/74ACT74 Data sheet acquired from Harris Semiconductor

ACT74

Abstract: AC74 74AGT
Contextual Info: NATIONAL SEHICOND LOGIC blE D NSC1 b S D U E E ÜD74777 National Semiconductor 7 ' - t f ¿ -o r-o s 54AC/74AC74 • 54ACT/74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop Asynchronous Inputs: LOW input to (Set) sets Q to HIGH level LOW input to Co (Clear) sets Q to LOW level

74AC74

Abstract: 74AC74MTC 74AC74SC 74AC74SJ 74ACT74 ACT74 M14A M14D MTC14
Contextual Info: Revised N ovem ber 1999 S E M I C O N D U C T O R TM 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Features The A C /AC T74 is a dual D -type flip-flop w ith Asynchronous C lear and Set inputs and com plem entary Q, Q outputs.

Contextual Info: Revised October 1998 j,f > i '' ^ : 3? •? » 74AC74 • 74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Asynchronous Inputs: The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.

act74

Abstract: AC74
Contextual Info: AC74 • ACT74 54AC/74AC74 • 54ACT/74ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop Description Connection Diagrams The ’AC/’ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Ü outputs. Information at the

MC0628R

Abstract: mc0628 MC0628R replacement FAIRCHILD SEMICONDUCTOR Fairchild cross KA3846 FDD8896 "drop-in replacement" FQPF3N60C FQP50N06 equivalent FDS8884
Contextual Info: Discontinued Product s 4296_ST42091 5092_F50188E 5FS1_NB5F009 73282 74ABT646CMSA 74ABT646CMSAX 74ABT646CMTC 74ABT646CSC 74AC251SJ 74AC299SJX 74AC74CW 74ACT151SJ 74ACT16646SSC 74ACTQ08SJX Replacement Product(s) NONE NONE FDS3580 None 74ABT646ADB 74ABT646ADB

Contextual Info: Technical Dala CD54/74AC74 CD54/74ACT74 Dual D-type Flip-Flop with Set and Reset Positive-Edge-Triggered Type Features: • B uffered inputs a Typical propagation delay: 4.9 ns @ Vcc - 5 V, TA = 25° C, CL = 5 0 p F FUNCTIONAL DIAGRAM & TERMINAL ASSIGNMENT