CD74AC Search Results

SCBA004C

Abstract: scaa035b
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS287 This data sheet is applicable to the CD54/74AC240, CD54ACT240, CD54AC241, and CD54/74ACT241. The CD74AC241 was not acquired from Harris Semiconductor. See SCHS244 for information on the CD74ACT240, CD74AC244, and CD74ACT244.

Contextual Info: CD74AC175 QUADRUPLE D-TYPE FLIP-FLOP WITH CLEAR SCHS347 – APRIL 2003 D D D D D D D D D M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage Buffered Inputs Contains Four Flip-Flops With Double-Rail

Contextual Info: CD74ACT14 HEX SCHMITTĆTRIGGER INVERTER SCHS319A − NOVEMBER 2002 − REVISED NOVEMBER 2004 D Inputs Are TTL-Voltage Compatible D Speed of Bipolar F, AS, and S, With E OR M PACKAGE TOP VIEW Significantly Reduced Power Consumption 1A 1Y 2A 2Y 3A 3Y GND D Greater Noise Immunity Than Standard

Contextual Info: CD54AC32, CD74AC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCHS343 – MARCH 2003 D D D D D D D CD54AC32 . . . F PACKAGE CD74AC32 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Buffered Inputs

Contextual Info: CD54AC163, CD74AC163 4-BIT SYNCHRONOUS BINARY COUNTERS SCHS299B – APRIL 2000 – REVISED MARCH 2003 D D D D CD54AC163 . . . F PACKAGE CD74AC163 . . . E OR M PACKAGE TOP VIEW Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting

Contextual Info: CD54AC161, CD74AC161 4-BIT SYNCHRONOUS BINARY COUNTERS SCHS239C – SEPTEMBER 1998 – REVISED MARCH 2003 D D D D D D CD54AC161 . . . F PACKAGE CD74AC161 . . . E OR M PACKAGE TOP VIEW Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading

ACT04

Abstract: CD54ACT04 CD54ACT04F3A CD74ACT04 CD74ACT04E CD74ACT04M CD74ACT04M96
Contextual Info: CD54ACT04, CD74ACT04 HEX INVERTERS SCHS310B – JANUARY 2001 – REVISED JUNE 2002 D D D D D D CD54ACT04 . . . F PACKAGE CD74ACT04 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption

CD74ACT86

Abstract: CD74ACT86MDREP CD74ACT86-EP
Contextual Info: CD74ACT86-EP QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE www.ti.com SCHS357 – MARCH 2006 FEATURES • • • • • • • • • 1 • Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C

AC08

Abstract: AC08M CD54AC08 CD54AC08F3A CD74AC08 CD74AC08E CD74AC08M CD74AC08M96
Contextual Info: CD54AC08, CD74AC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCHS307C – JANUARY 2001 – REVISED JUNE 2002 D D D D D D D CD54AC08 . . . F PACKAGE CD74AC08 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the

AC138

Abstract: AC138M CD54AC138 CD54AC138F3A CD74AC138 CD74AC138E CD74AC138M CD74AC138M96
Contextual Info: CD54AC138, CD74AC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003 D D D D D D D D CD54AC138 . . . F PACKAGE CD74AC138 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the

CD74AC20

Abstract: CD74AC20E CD74AC20EE4 CD74AC20M CD74AC20M96 CD74AC20M96E4 AC20M
Contextual Info: CD74AC20 DUAL 4ĆINPUT POSITIVEĆNAND GATES SCHS229B – SEPTEMBER 1998 – REVISED NOVEMBER 2002 D AC Types Feature 1.5-V to 5.5-V Operation D D D D D E OR M PACKAGE TOP VIEW and Balanced Noise Immunity at 30% of the Supply Speed of Bipolar F, AS, and S, With

ACT257

Abstract: CD54AC257 CD54AC257F3A CD74AC257E CD74AC257M CD74ACT258
Contextual Info: CD54/74AC257, CD54/74ACT257, CD74ACT258 Data sheet acquired from Harris Semiconductor SCHS248A Quad 2-Input Multiplexer with Three-State Outputs August 1998 - Revised May 2000 Features Description • ’AC257, ’ACT257. . . . . . . . . . . . . Non-Inverting Outputs

ACT05

Abstract: CD54ACT05 CD54ACT05F3A CD74ACT05 CD74ACT05E CD74ACT05M CD74ACT05M96
Contextual Info: CD54ACT05, CD74ACT05 HEX INVERTERS WITH OPENĆDRAIN OUTPUTS SCHS311 – JANUARY 2001 D Inputs Are TTL-Voltage Compatible D Speed of Bipolar FCT, AS, and S, With CD54ACT05 . . . F PACKAGE CD74ACT05 . . . E OR M PACKAGE TOP VIEW Significantly Reduced Power Consumption

Contextual Info: CD74AC86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCHS324 – JANUARY 2003 D D D D D D E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption

CD74ACT86-EP

Contextual Info: CD74ACT86-EP QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE www.ti.com SCHS357 – MARCH 2006 FEATURES • • • • • • • • • 1 • Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C

CD74ACT238

Abstract: CD74ACT238E MS-001
Contextual Info: CD74ACT238 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER SCHS330 –FEBRUARY 2003 D D D D D D D D E PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Designed Specifically for High-Speed

AC138M

Abstract: AC138 CD54AC138 CD54AC138F3A CD74AC138 CD74AC138E CD74AC138M CD74AC138M96 CD74AC13
Contextual Info: CD54AC138, CD74AC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCHS328A – JANUARY 2003 – REVISED FEBRUARY 2003 D D D D D D D D CD54AC138 . . . F PACKAGE CD74AC138 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the

CD74AC151

Abstract: CD74AC151E CD74AC151M96
Contextual Info: CD74AC151 8-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCHS333 – MARCH 2003 D D D D D D D E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage 8-Line to 1-Line Multiplexers Can Perform

Contextual Info: CD54AC161, CD74AC161 4-BIT SYNCHRONOUS BINARY COUNTERS SCHS239C – SEPTEMBER 1998 – REVISED MARCH 2003 D D D D D D CD54AC161 . . . F PACKAGE CD74AC161 . . . E OR M PACKAGE TOP VIEW Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading

Contextual Info: CD54ACT161, CD74ACT161 4-BIT SYNCHRONOUS BINARY COUNTERS SCHS298B – APRIL 2000 – REVISED MARCH 2003 D D D D D D D CD54ACT161 . . . F PACKAGE CD74ACT161 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Internal Look-Ahead for Fast Counting

AC32

Abstract: AC32M CD54AC32 CD54AC32F3A CD74AC32 CD74AC32E CD74AC32M CD74AC32M96
Contextual Info: CD54AC32, CD74AC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCHS343 – MARCH 2003 D D D D D D D CD54AC32 . . . F PACKAGE CD74AC32 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Buffered Inputs

CD54ACT153

Abstract: CD54ACT153F3A CD74ACT153 CD74ACT153E CD74ACT153M CD74ACT153M96 act153m
Contextual Info: CD54ACT153, CD74ACT153 DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS SCHS339 – MARCH 2003 D D D D D D Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current

CD54ACT109

Abstract: CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96
Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

SC*37

Abstract: CD74ACT139M CD74ACT139M96 CD54ACT139 CD54ACT139F3A CD74ACT139 CD74ACT139E act139m
Contextual Info: CD54ACT139, CD74ACT139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCHS337 – MARCH 2003 D D D D D D D D CD54ACT139 . . . F PACKAGE CD74ACT139 . . . E OR M PACKAGE TOP VIEW AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the