7421 IC Search Results

7421 pin configuration

Abstract: 7420 pin configuration 74LS20 PIN CONFIGURATION 7421 logic gate 7421 AND 74LS20 function table 74LS21 PIN CONFIGURATION TTL 7420 7421 AND gate PIN CONFIGURATION 7420
Contextual Info: Signehcs I 7420, 7421, LS20, LS21, S20 Gates Logic Products Dual Four-Input NAND '20 AND ('21) Gate Product Specification • TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT (TOTAL) 7420 10ns 8mA 74LS20 10ns 0.8mA 8mA 74S20 3ns 7421 12ns 8mA 74LS21

TTL 7421

Abstract: 7421 ttl AND gate TTL 7420 74LS21 PIN CONFIGURATION 7421 pin configuration 7420 pin configuration 74LS gates 7420 nand 74ls gate symbols PIN CONFIGURATION 7420
Contextual Info: Signetics I 7420, 7421, LS20, LS21, S20 Gates Logic Products Dual Four-Input NAND '20 AND ('21) Gate Product Specification • TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT (TOTAL) 7420 10ns 8mA 74LS20 10ns 0.8mA 74S20 3ns 8mA 7421 12ns 8mA 74LS21

TTL 7421

Abstract: 7421 ttl AND gate 7421 pin configuration PIN CONFIGURATION 7420 TTL 7420 logic gate 7421 AND 74LS20 PIN CONFIGURATION 7420 pin configuration 7420 SIGNETICS TTL 74LS20
Contextual Info: 7420, 7421, LS20, LS21, S20 Signetics Gates Dual Four-Input NAND 20 AND (’21) Gate Product Specification Logic Products TYPE TYPICAL SUPPLY CURRENT (TOTAL) TYPICAL PROPAGATION DELAY 7420 10ns 8mA 74LS20 10ns 0.8mA 74S20 3 ns 8mA 7421 12ns 8mA 74LS21 9ns

ic 7421

Abstract: TTL 7421 7421 ttl AND gate IC 7420 pin configuration ic 7421 function ic 7421 TTL 7420 7421 IC ic ttl 7421 pin configuration ic 7420
Contextual Info: Signetics I 7420, 7421, LS20, LS21, S20 Gates Logic Products Dual Four-Input NAND '20 AND ('21) Gate Product Specification H TYPICAL SUPPLY CURRENT (TOTAL) TYPICAL PROPAGATION DELAY TYPE 7420 10ns 8mA 74LS20 10ns 0.8mA 74S20 3ns 8mA 7421 12ns 8mA 74LS21

Contextual Info: 54/7421 54H/74H21 54LS/74LS21 ORDERING CODE PIN CONFIGURATIONS See Section 9 for further Package and Ordering Information. PACKAGES PIN CONF. COMMERCIAL RANGES MILITARY RANGES VCC = 5V ± 5%; Ta = 0°C to *70°C VCC = 5V ± 10"/.; Ta = -55°C to *125°C

ls 7421

Abstract: logic gate 7421 AND 74LS21
Contextual Info: NATIONA L S E M C O N D {LOGIC} DEE D I LSQ115E DD^bSt, 1 I 21 T -< /3 -/!T CONNECTION DIAGRAMS PINOUT A 54/7421 54H/74H21 54LS/74LS21 DUAL 4-INPUT POSITIVE AND GATE ORDERING COPE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE Vcc = +5.0 V ±5%, = 0°C to +70° C

74LS21

Abstract: 7421 pin configuration 74LS N7421F N7421N N74H21F N74H21N N74LS21F N74LS21N S5421F
Contextual Info: 54/7421 54H/74H21 54LS/74LS21 ORDERING CODE PIN CONFIGURATIONS See Section 9 for further Package and Ordering Information. C O M M E R C IA L RANGES = 5V ± 5%; T a = 0°C to *70°C PACKAGES PIN CON F. Plastic DIP Fig. A Fig. A N7421N • N74H21N N74LS21N

ic 7421

Abstract: OF IC 7421 7421 IC ls 7421 jrc 26
Contextual Info: - 7421 35 - Dual 4 Input AND V cc ZD 2C NC 26 2A 2Y li i n i n > n i n i n i r L i f 1A O7420 ÉO A N D IB NC 1C ID 1Y GND 9 \ T o Y - A • B • C • I xi) ft* OUT N LS ALS tpd max L-*H 27 15 26 6. 6 6 8 10 ns tpd max H-*L t \ 19 20 10 6. 3 6 8 10 ns Icc

Contextual Info: M 37421P -000S S M 37421P -001S S PIG G YBAC K fo r M 3 7 4 2 1 M 6 -X X X S P DESCRIPTION FEATURES T h e M 3 7 4 2 1 P -0 0 0 S S and th e M 3 7421 P -001 S S a re E P R O M • m o u n ted -typ e m icrocom puters which utilizes C M O S te c h ­ 1 R O M Ie s s , E P R O M is attac h e d externally.

Contextual Info: ABCDEFBG$H$ABCDIDEBDHJKALHM$NOPQR HST&U%V W$XYW$Z%#%Z%  !"# $%&%#'& "' # 4 * [\]^_`ab_`cdef`eghgicdh^jc^i klhmg`cdm\dhf`agcn^ig o^\`j`igpdbdm o^\`j`ibdmmgm^ odm\dhgcqhrst`agcn^i +3,3-747 2.2513/ 5205/ 15 252  23 31577 5

generators winding circuit diagrams

Abstract: ASEA motor RTXP 18 ASEA overheating relay design asea RK92-11 asea over current relay 023BA ASEA motor oil RXME 1
Contextual Info: Catalogue RK 65-26 E Edition 1 1981-04 File R, Part 1 Thermal overcurrent relays • 3> 3I> For preventing dangerous overheating in motors, genera­ tors, transformers and conductors when these are subject to overloads. • Avs ilabl e with seven d if fere nt time eo nstants

87R2

Abstract: M 6965 ECQ-06-02081
Contextual Info: 7 T H IS DRAW ING IS U N P U B L IS H E D . COPYRIGHT - RELEASED BY TYCO ELECTRON ICS CORPORATION. 5 6 4 3 2 FO R PU BLICATIO N A L L R IG H T S R E S E R V E D . LOC D IS T GP 00 R E V IS IO N S LTR G1 8 .3 8 [. 3 3 0 COVER D E S C R IP T IO N DATE DWN JDP CWR

d1266

Abstract: 7421 pin configuration CYM7420PB-20C CYM7421PB-20C PM09 Package 7421 PM-09
Contextual Info: CYM7420 CYM7421 PRELIMINARY 82420 PCIsetĆCompatible Level II Cache Modules Features D D D D D D D D D TTLĆcompatible inputs/outputs Functional Description 128 Kbytes CYM7420 , 256 Kbytes (CYM7421) cache module organized as 32K by 32 or 64K by 32 Tag width of 7/8 bits plus valid bit

Contextual Info: — — CYM742Ô CYM7421 _ PRELIMINARY r^ C Y rn h b o = 82420 PCIset-Compatible Level II Cache Modules Features • TTL-compatible inputs/outputs • 128 Kbytes CYM7420 , 256 Kbytes (CYM7421) cache module organized as 32K by 32 or 64K by 32 Functional Description

74ls21p

Abstract: 7421 Dual 4-input AND gate 74LS21 74H21 7421 54H21DM 54H21FM 54LS21 54LS21FM 74LS21PC
Contextual Info: 21 C O N N E C T IO N D IA G R A M S P IN O U T A /5 4 /7 4 2 1 54H /74H 21 r / ^54LS/74LS21 ^^ DUAL 4-IN P U T POSITIVE AND GATE O R D E R IN G CO D E: See S e ctio n 9 PIN PKGS OUT C O M M E R C IA L G RADE M ILITA R Y G RADE V c c = + 5.0 V ±5%, T a = 0 °C to + 7 0 ° C

7421 AND gate

Abstract: 7421 74LS21 74LS21P 7421 Dual 4-input AND gate 74LS21PC 74LS21DC DC5421 54H21DM 54H21FM
Contextual Info: 21 CO NNECTIO N DIAGRAMS PINOUT A /5 4 /7 4 2 1 i/54H/74H21 r 54LS/74LS21 / m s t - ^ fo f/c a DUAL 4-IN P U T POSITIVE AND GATE ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, T a = 0°C to +70° C Vcc = +5.0 V +10%,

CI 74LS08

Abstract: 7432 TTL fairchild TTL 7421 74LS21 ttl 7432 TTL 74ls32 TTL 7409 TTL 7486 TTL 74ls86 TTL 7432 fairchild
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi

ic 74138

Abstract: IC 7402, 7404, 7408, 7432, 7400 ic 74139 IC 74147 IC 74373 74148 IC IC 74374 ic 7408, 7432, 7404, 7400, 7433, 7486, 74266 IC 74245 74189
Contextual Info: LEAPER-1 HANDY DIGITAL IC TESTER Supported Devices Features EMC Standards 1.Easy-operating Tester, particularly per 89/336/EEC be designed for the Digital IC 2.Supported Device : 74 / 40 / 45 / 41 / 44 Serial. 3.Small, portable, light and powersaving, usable with batteries.

logic diagram of 7432

Abstract: CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi lyi rn

l04 ic code

Abstract: ic 7421
Contextual Info: 4 T H IS D R A W IN G C O P Y R IG H T IS 2 U N P U B L IS H E D . 1988 40,60 POS BY ^ C O RELEASED E L E C T R O N IC S FO R ALL C O R P O R A T IO N . P U B L IC A T IO N R IG H T S MAR REVISIONS 19 88 - RESERVED. LTR 30,50 POS PLUG HOUSING A1 D E S C R IP T IO N

1N4687 DO-7

Contextual Info: Zener Regulator Diodes Part N um ber M icrosem i Division Scottsdale Scottsdale JAN1N4620AUR-1 Scottsdale Scottsdale JAN TX1N 4620 Scottsdale JAN TX1N4620-1 JANTX1N4620AUR-1 Scottsdale Scottsdale JAN TX V1N 4620 Scottsdale JANTXV1N4620-1 JAN TXV1N 4620AU R -1 Scottsdale

Contextual Info: 4 T H IS D R A W IN G C O P Y R IG H T S 2 U N P U B L IS H E D . 1988 RELEASED BY ^ C O E L E C T R O N IC S FO R ALL C O R P O R A T IO N . P U B L IC A T IO N R IG H T S MAR 1988. R E V IS IO N S RESERVED. LTR D E S C R IP T IO N D1 40,60 POS 30,50 POS

LS 7411

Abstract: ls 7408 7411 triple 3-input AND 7408 hct 3- input 7408 ls 7421 7408 T4015 7408 LS
Contextual Info: - 26 T rip le 3 In p u t A N D 741 1 VCC 1C 1Y 3C 1A 16 2A 26 39 3A 3Y 07410<7>AND* -f 7 Y = A • B •C 74LS11 IM S ± 'h K ~ h N LS ALS ALSK F S AS AC tpd max L^ H t 40 15 13 10 6 .6 7 6 8 .5 25 tpd max H— L 1 25 20 10 9 OUT 6. 5 7 .5 5 .5 7 .5 6 .2 24

TTL 7486

Abstract: FL 9014 TTL 7421 ttl 7432 TTL 7411 TTL 7409 7486 TTL 7411 74LS86 74LS08
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi ly i r n