72791 Search Results

Contextual Info: IDT71321SA/LA HIGH SPEED IDT71421SA/LA 2K X 8 DUAL-PORT STATIC RAM WITH INTERRUPTS F eatures ♦ MASTER IDT71321 easily expands data bus width to 16-or- ♦ High-speed access IDT71321/IDT71421SA more-bits using SLAVE IDT71421 ♦ On-chip port arbitration logic IDT71321 only

rtc ds130

Contextual Info: Surge Protection AC & DC Power Photovoltaic Telecom Dataline Coaxial SURGE PROTECTORS for AC & DC Power, Photovoltaic, Telecom, Dataline, & Coaxial - 9 t h e d i t i o n , N o r t h A m e r i c a 9 th E d i t i o n North America 1 9 th E d i t i o n North America

luminous inverter circuit diagram for repairing

Abstract: citel 08 90v
Contextual Info: 9 th e d i t i o n Surge Protection Electrical Installations Photovoltaic Telecom Data Radiocommunication General Catalog 9th edition p. 6 DIN RAIL AC POWER SURGE PROTECTORS p. 60 p. 70 AC POWER SURGE PROTECTORS p. 78 p. 94 HIGH FREQUENCY COAXIAL SURGE PROTECTORS

idt7132

Abstract: ROY TODD IDT71321 IDT71421 71321SA J52-1
Contextual Info: IDT71321SA/LA HIGH SPEED IDT71421SA/LA 2K X 8 DUAL-PORT STATIC RAM WITH INTERRUPTS F eatures ♦ MASTER IDT71321 easily expands data bus width to 16-or- ♦ High-speed access IDT71321/IDT71421SA more-bits using SLAVE IDT71421 ♦ On-chip port arbitration logic IDT71321 only

Contextual Info: HIGH-SPEED 3.3V 32K x 8 DUAL-PORT STATIC RAM PRELIMINARY IDT70V07S/L F e a tu re s True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed access ♦ - ♦ Commercial: 25/35/55ns max. Low-power operation -

Contextual Info: HIGH SPEED 4K X 8 DUAL-PORT STATIC RAM WITH SEMAPHORE D e sc rip tio n F e a tu re s • High-speed access - Commercial: 20/25/35/45/55/70ns max. • Low-power operation - IDT71342SA Active: 700mW(typ.) Standby: 5m W (typ.) - ID T 7 1 3 4 2 S A /L A IDT71342LA

S0323

Abstract: IDT71024S70 K 3568
Contextual Info: CMOS STATIC RAM 1 MEG 128K x 8-BIT IDT71024S70 FEATURES: DESCRIPTION: • 1 2 8 K x 8 CM O S static RAM • Equal access and cycle times — Commercial: 70ns • Two Chip Selects plus one Output Enable pin • Bidirectional inputs and outputs directly TTL-compatible

Contextual Info: PRELIMINARY IDT71V33S/L IDT71V43S/L HIGH-SPEED 2 K X 16 DUAL-PORT STATIC RAM Integrated Device Technology, Inc. FEATURES: • High-speed access — Com m ercial: 25/35/55ns max. • Low-power operation — IDT71V33/43S Active: 750 mW (typ.) Standby: 3.3m W (typ.)

water conductivity meter circuit

Abstract: conductivity meter circuit water conductivity meter drive circuit conductivity meter WEY-400 dielectric constant of aluminium capacitor Z. Dou, R. Xu, A. Berduque, CARTS Europe 2008 bhc capacitor Electrolytic Capacitors Product safety butyrolactone
Contextual Info: The Development of Electrolytes in Aluminium Electrolytic Capacitors for Automotive and High Temperature Applications Zongli Dou, Rong Xu, Alfonso Berduque Research and Development Department, BHC Components LTD KEMET , 20 Cumberland Drive, Granby Industrial Estate, Weymouth, Dorset DT4 9TE, United Kingdom.

72791

Abstract: Si7636DP
Contextual Info: SPICE Device Model Si7636DP Vishay Siliconix N-Channel 30-V D-S MOSFET CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range

Contextual Info: CMOS SyncBiFIFO“ 2 5 6 x 1 8 x 2 and 5 1 2 x 1 8 x 2 IDT72605 IDT72615 Integrated Device Technology, Inc. FEATURES: • Two independent FIFO m em ories for fully bidirectional data transfers • 256 x 18 x 2 organization IDT72605 • 512 x 18 x 2 organization (IDT72615)

Contextual Info: ydt HIGHSPEED 2K X 8 DUAL-PORT IDT71321SA/LA IDT71421SA/LA STATIC RAM WITH INTERRUPTS Integrated De vice Technology, Inc. FEATURES: M ASTER IDT71321 easily expands data bus w idth to 16- • H igh-speed access — C om m ercial: 20/25/35/55ns max.) or-m ore-bits using SLAVE IDT71421

Contextual Info: IDT70914S HIGH SPEED 36K 4K X 9 SYNCHRONOUS DUAL-PORT RAM Features * * High-speed clock-to-data output times - F ast 12ns clock to data out - M ilitary: 20125ns (max.) - S elf-tim ed write allow s fast cycle tim es - C o m m e rc ia l^ 2 /1 5/20ns (max.)

pinout of ic 4033

Contextual Info: 3.3V CMOS STATIC RAM 1 MEG 256K x 4-BIT REVOLUTIONARY PINOUT PRELIMINARY IDT71V128 Integrated D evice T echnology, Inc. FEATURES: DESCRIPTION: • 256K x 4 advanced high-speed CM O S static RAM • JEDEC revolutionary pinout (center power/GND) for reduced noise.

IDT71028S

Contextual Info: CMOS STATIC RAM 1 MEG 256K x 4-BIT IDT71028S70 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • 256K x 4 C M O S static RAM • Equal access and cycle times — Commercial: 70ns • One Chip Select plus one Output Enable pin • Bidirectional data Inputs and outputs directly

MO-081

Contextual Info: IDT7133SA/LA IDT7143SA/LA HIGH SPEED 2 K X 16 DUAL-PORT SRAM î * 44k 4 'S 4k «h* '> «% • % « «' S S*'» «t % *S ««Í '■ •*SÂfea! F e a tu re s ♦ High-speed access ♦ BUSY output flag on IDT7133; BUSY input on IDT7143 - M ilitary: 25/35/45/55/70/90ns max.

HP psc 1215

Contextual Info: CMOS SyncBiFIFO“ 256 x 18 x 2 and 512 x 18 x 2 IDT72605 IDT72615 In te g ra te d D e vice T e ch n o lo g y, Inc. FEATURES: DESCRIPTION: • Two independent FIF O mem ories for fully bidirectional data transfers • 25 6 x 18 x 2 organization ID T 72605

land pattern PQFP 132

Abstract: PQFP 132 PACKAGE DIMENSION MO-112 N2979 land pattern PQFP 208
Contextual Info: PACKAGE DIAGRAM OUTLINES PQFP Continued PACKAGE DIAGRAM OUTLINES PQFP (Continued) R E V ISIO N S DWG § s Y M B □ REV DESCRIPTION DATE 27649 04 REDRAW TO JEDEC FORMAT 01/24/92 APPROVED P Q 80- JEDEC VARIATION N □ B E -2 LAND PATTERN DIMENSIONS T E L

thermotron

Abstract: suzuki DT4 SE300 WEY-400 WEY-400-3 WEY-100 Berduque bhc capacitor WEY-400-1 chang capacitor
Contextual Info: Further Electrolyte Development for High Temperature Aluminium Electrolytic Capacitors Rong Xu, Alfonso Berduque, Zongli Dou Electrolytic Innovation Centre BHC Components Ltd KEMET 20 Cumberland Drive, Granby Industrial Estate Weymouth, Dorset DT4 9TE, United Kingdom

Contextual Info: 4 *8 *« S \ 4»* «tt *« ' S'» \ 4k* «t *&*«&&* *4 K *t '4t 4 'S 4k 4k' HIGH-SPEED 3.3V 16Kx 8 DUAL-PORT STATIC RAM IDT70V06S/L F e a tu re s True Dual-Ported memory cells which allow simultaneous reads of the same memory location ♦ High-speed access

Contextual Info: CMOS SyncFIFO 256x18, 5 1 2 x 1 8 ,1 ,0 2 4 x 1 8 , 2,048x18 and 4,096x18 FEATURES: • • • • • • • • • • • • • • • • 256 x 18-bit organization array IDT72205LB 512 x 18-bit organization array (IDT72215LB) 1,024 x 18-bit organization array (IDT72225LB)

72791

Abstract: Si7636DP
Contextual Info: SPICE Device Model Si7636DP Vishay Siliconix N-Channel 30-V D-S MOSFET CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range

Contextual Info: HIGH-SPEED 3.3V 4 K x 16 DUAL-PORT STATIC RAM F e a tu re s True Dual-Ported memory cells which allow simultaneous reads of the same memory location ♦ High-speed access ♦ - ♦ Com mercial: 25/35/55ns max. Low-power operation - IDT70V24S A ctive: 23 0 m W (typ.)

RT 2070 L

Abstract: ansi y14.5m-1982 decimal 2097b MS-001 72741
Contextual Info: PACKAGE DIAGRAM OUTLINES PLASTIC DIP R E V ISIO N S DCN REV DESCRIPTION DATE 27853 06 REDRAW TO JEDEC FORMAT 03/15/95 APPROVED A A A — I— - E - - .0S0/.070 A I * 1 .01 0 I H lAdXBSX 1 1 - j- GlAUL HLANL It bad l-A -l SEATING PIANE