54LS37 Search Results

54LS375DMQB

Abstract: 54LS375FMQB DM74LS375M DM74LS375N J16A LS75
Contextual Info: LS375 ITT NATIONAL SEMICOND -CLOGIO B1E D b5D115E GG7G1Q0 Q EjaI National À jA Semiconductor 'T - ^ U - 0 ' 7- o ci 54LS375/DM74LS375 4-Bit Latch General Description The 'LS375 Is a 4-bit D-type latch for use as temporary stor­ age for binary Information between processing units and in­

54LS373

Contextual Info: MOTOROLA Military 54LS373 O c ta l D -Type Flip -Flo p W ith T ra n s p a re n t La tch and 3 -State O u tp u ts ELECTRICALLY TESTED PER: MIL-M-38510/32502 AVAILABLE AS: The 54LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the

ls375

Contextual Info: LS375 National Semiconductor 54LS375/DM74LS375 4-Bit Latch General Description The 'LS375 is a 4-bit D-type latch for use as temporary stor­ age for binary information between processing units and in­ put/output or indicator units. When its Enable E input is

54LS37

Contextual Info: 3 Quad 2-Input Military 54LS37 MOTOROLA < > kàfagà Positive NAND Buffer MP0 ELECTRICALLY TESTED PER: MIL-M-38510/30202 /////// LOGIC DIAGRAM V cc B4 A4 Y4 B3 A3 Y3 AVAILABLE AS: 1 JAN: JM38510/30202BXA 2) SMD: N/A 3)883: 54LS37/BXAJC X = CASE OUTLINE AS FOLLOWS:

54LS379

Abstract: 54LS379DMQB 54LS379FMQB 54LS379LMQB DM74LS379 DM74LS379M DM74LS379N E20A LS175 LS379
Contextual Info: 54LS379 DM74LS379 Quad Parallel Register with Enable General Description Features The LS379 is a 4-bit register with buffered common Enable This device is similar to the LS175 but features the common Enable rather than common Master Reset Y Y Y Y Connection Diagram

Contextual Info: 54LS375, SN74LS375 4 BIT BISTABLE LATCHES OCTOBER 1 9 7 6 - REVISED M AR C H 1988 SN 54LS375 . . . J OR W PACKAGE SN 74LS375 . . . D O R N PACKAGE Supply Voltage and Ground on Corner Pins To Sim p lify P-C Board La y o u t TOP VIEW ID £ ^1 6 IQ description

pin DIAGRAM OF IC 74ls75

Contextual Info: 54LS375, SN74LS375 4-BIT BISTABLE LATCHES OCTOBER 1976 - REVISED MARCH 1988 SN 54LS375 . . . J OR W PACKAGE SN 74LS375 . . . D OR N PACKAGE Supply Voltage and Ground on Corner Pins To Simplify P-C Board Layout {TOP VIEW ID C 1 U i6 IQ C 2 ts 3 1Q 3 14 3

D1417

Abstract: LS377 54LS377DMQB 54LS377FMQB 54LS377LMQB DM74LS377WM E20A W20A
Contextual Info: National Æ Ü Semiconductor 54LS377/DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The ’LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buff­

54LS375DMQB

Abstract: 54LS375FMQB DM74LS375M DM74LS375N J16A LS75 M16A N16E DM74LS375
Contextual Info: LS375 National Semiconductor 54LS375/DM74LS375 4-Bit Latch General Description The ’LS375 is a 4-bit D-type latch for use as temporary stor­ age for binary information between processing units and in­ put/output or indicator units. When its Enable E input is

Contextual Info: TYPES SN74LS375, 54LS375 4-BIT BISTABLE LATCHES OCTOBER 1976 - REVISED DECEM BER 1983 Su p p ly Voltage and G rou n d on C orner Pins T o Sim p lify P-C Board L a y o u t SN 54LS375. J PACKAGE SN74LS375 . D OR N PA CKAG E TOP VIEW logic id F U N C T IO N T A B L E

Contextual Info: M MOTOROLA Military 54LS374 Octal D Flip-Flop With 3-State Outputs MPO ELECTRICALLY TESTED PER: M IL-M -38510/32503 T h e 54L S 3 7 4 is a high-speed, lo w -p ow e r O ctal D -type Flip-F lop fe a tu ring se pa ra te D -type inputs fo r each flip -flo p and 3-sta te o utp uts fo r

54ls374

Contextual Info: g > M ilita ry 54L S 374 MOTOROLA O c ta l D Flip-Flop W ith 3 -S ta te O utputs MPO ELECTRICALLY TESTED PER: MIL-M-38510/32503 The 54LS374 is a high-speed, low-power Octal D-type Flip-Flop featuring separate D-type inputs for each flip-flop and 3-state outputs for

Contextual Info: M M OTOROLA Military 54LS375 4-Bit Bistable Latch ELECTRICALLY TESTED PER: MIL-M-38510/31604 The 54LS375 is a 4-bit D-Type Latch for use as tem porary storage for binary information between processing limits and input/output or indicator units. When the Enable (E) is HIGH, information present at the

1N3064

Abstract: 54LS375 2E124
Contextual Info: M M O T O R O L A Military 54LS375 4-Bit Bistable Latch ELECTRICALLY TESTED PER: Ml L-M-38510/31604 The 54LS375 is a 4-bit D-Type Latch for use as temporary storage for binary information between processing limits and input/output or indicator units. When the Enable (E) is HIGH, information present at the

Contextual Info: M M O T O R O L A M ilitary 54LS375 4-Bit Bistable Latch ELECTRICALLY TESTED PER: Ml L-M-38510/31604 HPO mm The 54LS375 is a 4-bit D-Type Latch for use as temporary storage for binary information between processing limits and input/output or indicator units. When the Enable (E) is HIGH, information present at the

Contextual Info: 54LS377 Signetics Flip-Flop Octal D Flip-Flop With Clock Enable Product Specification Military Logic Products ORDERING INFORMATION FEATURES DESCRIPTION • Ideal for addressable register applications The 54LS377 has eight edge-triggered, D-type flip-flops with individual D inputs

Contextual Info: ZWA National ææ Semiconductor 54LS379/DM74LS379 Quad Parallel Register with Enable General Description Features The LS379 is a 4-bit register with buffered common Enable. This device is similar to the LS175 but features the common Enable rather than common Master Reset.

sm 6415 a-4 s

Contextual Info: M M O T O R O L A M ilitary 54LS375 4-Bit Bistable Latch ELECTRICALLY TESTED PER: MIL-M-38510/31604 The 54LS375 is a 4-Bit D-Type Latch fo r use as tem porary storage for binary inform ation between processing lim its and input/output or indi­ cator units. When the Enable (E) is HIGH, inform ation present at the D

Contextual Info: M MOTOROLA Military 54LS374 O c ta l D Flip -Flo p W ith 3 -S ta te O u tp u ts ELECTRICALLY TESTED PER: MIL-M-38510/32503 The 54LS374 is a high-speed, low-power Octal D-type Flip-Flop featur­ ing separate D-type inputs for each flip-flop and 3-state outputs for bus

54LS373

Contextual Info: M M O T O R O L A Military 54LS373 Octal D-iype Flip-Flop With TVansparent Latch and 3-State Outputs M ELECTRICALLY TESTED PER: M IL-M -38510/32502 u The 54LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the

LS377

Contextual Info: LS377 £ 2 National Semiconductor 54LS377/DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The 'LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable. The device is packaged in the

Contextual Info: NATIONAL SEUICOND -CLOGIC3- 31E D • k.501125 DQ7Q1Q3 t. 54LS377/DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description Features The 'LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight

54LS374

Abstract: 54LS373 54S374 LS374 F 8212 LS 373
Contextual Info: Signetics 54LS373, 54LS374, 54S373, 54S374 Latches/Flip-Flops '373 Octal Transparent Latch with 3-State Outputs ’374 Octal D Flip-Flop with 3-State Outputs Product Specification Military Logic Products ORDERING INFORMATION FEATURES DESCRIPTION • 8-bit transparent latch — ’373

54LS378FMQB

Abstract: DM74LS378M DM74LS378N J16A LS174 LS378 M16A 54LS378 N16H d20304
Contextual Info: LS378 NATIONAL SEflICOND -CLOGÏC3- fc.5ai3.2a GGTQlOfc. 1 B1E D National Semiconductor 54LS378/DM74LS378 Parallel D Register with Enable General Description Features The 'LS378 is a 6-bit register with a buffered common en­ able. This device is similar to the 'LS174, but with common