4531B Search Results

Contextual Info: R&E 4531B INTERNATIONAL, INC. CMOS 12-BIT PARITY TREE FEA TU RES 4 4 4 CONNECTION DIAGRAM all packages Variable Word Length Buffered Output Parity Selection Input The 4531B 12-Bit Parity Tree is con­ structed with MOS P-channel and N-channel enhancement-mode devices in a single monolithic

Contextual Info: iàt^ité^sM Æ iââSiààtm tM GOLDSTAR TECHNOLO GY INC-, 04E D | 402Û757 OODlTTb H 4028757 G O L D S T A R TECHNO L O G Y INC. 04E 01796 D T-V5-/7 4531B 13-INPUT PARITY CHECKER GENERATOR DESCRIPTION — The 4531B Is a 13-Input Parity Checker/Generator w ith 13 Parity Inputs I q - I ^

4531b

Contextual Info: M O T O R O L A M CI 4531B 12-BIT PARITY TREE CMOS MSI The M C 1 4 5 3 1 B 12-bit p arity tree is constructed w ith M O S Pchannei and N-c:hannel enhancem ent mode devices in a single m ono­ lithic structure. The circuit consists o f 12 data-bit inputs { 0 0 thru

4560B

Abstract: 24Hr bcd adder 40085 4008B 4582B u 19 c109 40085B 4527B 4581B
Contextual Info: FAIRCHILD DIGITAL CMOS 4L,6B,9B 4L,6B,9B 4 C68 4L,6B,9B Magnitude Comparator 4 C69 4L,6B,9B Data Path Switch 4 C70 4M,6Q,9U Arith Logic Register Stack 4 C71 4M.6Q.9U 4 C72 4M,6Q,9U 4x2 C108 4M,6N,9N Adder 4560B BCD Adder Carry Lookahead 4582B Carry Lookahead Block

4017BP

Abstract: 4013BP 4069BP 4016BP 4066bp hef 4011bp IC NAND 4040BP 4000BP 40106BP 4030BP
Contextual Info: Signetics Integrated Circuits - Loemos HEF 4000 Series LOCIMOS Locally Oxidised CMOS LOCM OS g e n e r a l d e s c r ip t io n LOCMOS is com ple tely pin, fu n c tio n and ty p e num ber com patible w ith th e 4 0 0 0 and 14000 fam ilies. Compared w ith o rd in a ry CMOS, LOCMOS c irc u it

4531B

Abstract: A115A T6819 T6819-TBQ T6819-TBS T6829 T6829-TBS U5021M
Contextual Info: Features • • • • • • • • • • • • • • Supply Voltage up to 40 V RDSon Typically 0.5 Ω at 25°C, Maximum 1 Ω at 150°C Up to 1.5 A Output Current Three High-side and Three Low-side Drivers Usable as Single Outputs or Half Bridges

SCL4000B

Contextual Info: 4508B INTERNATIONAL, INC CMOS DUAL 4-BIT LATCH FEATURES ♦ ♦ ♦ ♦ Two Independent Four-Bit Latches 3-State Outputs Direct Reset All Inputs Buffered CONNECTION DIAGRAM alt packages Q3g Q2g Q1 B QOg Disg MRg D3B D1B I d o b 1 D2B stb I V DD l 1 1 1 _L_J_I_ _i_L_

HC165A

Abstract: TC9525F VHC165 TC9534N HC4050A HC4520A TC8215uf HC4049A TC24SC HCT164A
Contextual Info: MOS Industrial ICs AD Converter - je Conversion Resolution Time Type No. Conversion Mode Input Channel TC5090AP 8b it 2ms Integration method 1 TC5091AP Bbit 2ms " 6 TC5092AP 13bit 8.2ms ’ 8 TC5093AP 8b it 50ps Successive approximation 8 Output Formst

logos 4012B

Abstract: 1LB553 Rauland ETS-003 Silec Semiconductors MCP 7833 4057A transistor sr52 74c912 1TK552 74S485
Contextual Info: L p i > « , * S E m Ic O N VOLUM E 3 INTERNATIONAL INTEGRATED CIRCUITS INDEX 5th EDITION 1985 Revised June 1985 COMPILED AND PUBLISHED BY S E M IC O N IN D E X E S L IM IT E D THE SEMICON INDEX SERIES CONSISTS OF VOLUME 1 TRANSISTOR INDEX VOLUME 2 DIODE & SCR INDEX