3DS0 Search Results

DS 2020

Abstract: CY7B993V CY7B994V JESD22-A114 LCK4993 LCK4993YH-DB LCK4993YH-DT LCK4994 chilled water system
Contextual Info: Data Sheet, Revision 1 May 5, 2004 LCK4993/LCK4994 Low-Voltage PLL Clock Drivers 1 Features • 12 MHz—100 MHz LCK4993 , or 24 MHz—200 MHz (LCK4994) output operation ■ Matched pair output skew <200 ps ■ Zero input-to-output delay ■ 18 LVTTL 50% duty-cycle outputs capable of driving

3BR0665JF

Abstract: 2qs02g BTN7970B ICB1FL02G ICE2qs01 equivalent stepper+434 3br0665 TLE8209-1
Contextual Info: Evaluation boards for Automotive, Industrial and Multimarket Applications 2010 [ www.infineon.com/evalkits ] Contents Automotive 05 Motor control 11 Industrial control & automation 15 Power management 19 Lighting & LED 22 Consumer 25 Communication 30 Microcontroller

measurement of voltage using adc C8051F350

Abstract: C8051F350 C8051F350/2 c8051f350 adc code example MCS-51 Macro Assembler Users Guide C8051F351 C8051F352 C8051F353 CIP-51 LQFP-32
Contextual Info: C8051F350/1/2/3 8 k ISP Flash MCU Family Analog Peripherals - 24 or 16-Bit ADC • No missing codes • 0.0015% nonlinearity • Programmable conversion rates up to 1 ksps • 8-Input multiplexer • 1x to 128x PGA • Built-in temperature sensor - Two 8-Bit Current Output DACs

U4B R950

Abstract: PC MOTHERBOARD GIGABYTE CIRCUIT diagram SCHEMATIC gigabyte MOTHERBOARD CIRCUIT diagram C828 3-pin transistor C1162 transistor C1162 gigabyte g31 MOTHERBOARD SERVICE MANUAL emp3128 transistor C1162 Scheme motorola r1009
Contextual Info: MPC8560 PowerQUICC III Torridon User’s Guide MPC8560UG Rev. 0.1 12/2004 PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE How to Reach Us: Home Page: www.freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370

Contextual Info: RoboClock CY7B993V, CY7B994V High Speed Multi Phase PLL Clock Buffer Features Functional Description • 500 ps Max Total Timing Budget TTB window ■ 12 MHz to 100 MHz (CY7B993V), or 24 MHz to 200 MHz (CY7B994V) Input/Output Operation ■ Matched Pair Output Skew < 200 ps

LCK4993V

Abstract: CY7B993V CY7B994V JESD22-A114 LCK4994 LCK4994V
Contextual Info: Advance Data Sheet November 2002 LCK4993V/LCK4994V Low-Voltage PLL Clock Drivers Features • 12/100 MHz LCK4993V , or 24/200 MHz (LCK4994V) output operation ■ Matched pair output skew <200 ps ■ Zero input-to-output delay ■ ■ ■ ■ ■ ■ ■ 18 LVTTL 50% duty-cycle outputs capable of

3bs02

Abstract: 2bs01 08P06P TDA 16888 ICE2pcs02 tda16846 ICE3B1565J mosfet 18p06p TDA4605 ICE3B0365J
Contextual Info: MOSFETs, PWM Control ICs, SMPS ICs, Gate Driver, PFC ICs, Silicon Carbide High Voltage Schottky Diodes February 2008 Power Management & Supply Selection Guide www.infineon.com/powermanagement Introduction I n f i n e o n ’ s P o w e r S e mi c o n d u c t o r p h i l o s o p h y is rather

CY7B993V

Abstract: CY7B993V-2AC CY7B993V-2AI CY7B994V CY7B994V-2AC
Contextual Info: RoboClock CY7B994V CY7B993V High-speed Multi-phase PLL Clock Buffer Features • 500-ps max. Total Timing Budget TTB™ window • 12–100-MHz (CY7B993V), or 24–200-MHz (CY7B994V) output operation • Matched pair output skew < 200 ps • Zero input-to-output delay

CY7B993V

Abstract: CY7B994V LCK4993 LCK4994
Contextual Info: Advance Data Sheet December 4, 2003 LCK4993/LCK4994 Low-Voltage PLL Clock Drivers 1 Features • 12 MHz—100 MHz LCK4993 , or 24 MHz—200 MHz (LCK4994) output operation ■ Matched pair output skew <200 ps ■ Zero input-to-output delay ■ ■ ■ 18 LVTTL 50% duty-cycle outputs capable of driving

CY7B993V

Abstract: CY7B993V-2AC CY7B994V CY7B994V-2AC CY7B994V-2BBC CY7B994V-2BBI
Contextual Info: RoboClockII CY7B994V CY7B993V High-Speed Multi-Phase PLL Clock Buffer Features Functional Description • 12/100-MHz CY7B993V , or 24/200-MHz (CY7B994V) output operation • Matched pair output skew <200 ps • Zero input-to-output delay • 18 LVTTL 50% duty-cycle outputs capable of driving

WL 27 F430

Abstract: 160-F430 Sensick 160-F132 LL3-DS06 160-E420 sick optic typ WL 9 ll3-dt01 LL3-DF02 160-te
Contextual Info: DB_W 160_Titel_en.qxp 26.07.2002 9:45 Uhr Seite 25 for use in the branches: • Electronic components and circuit board manufacturing ■ Packaging and printing industry ■ Assembly and handling technology ■ Special mechanical engineering ■ Conveyor technology.

CY7B993V

Abstract: CY7B994V
Contextual Info: RoboClock, CY7B994V CY7B993V PRELIMINARY High-Speed Multi-Phase PLL Clock Buffer Features Functional Description • 12/100-MHz CY7B993V , or 24/185-MHz (CY7B994V) output operation • Matched pair outputs skew <200 ps • Zero input-to-output delay • 18 LVTTL 50% duty-cycle outputs capable of driving

2DS1

Abstract: CY7B993V CY7B994V 24185
Contextual Info: RoboClockII CY7B994V ADVANCED INFORMATION CY7B993V High-Speed Multi-Phase PLL Clock Buffer Features • Matched pair outputs skew <200 ps 200 ps MAX • 3.3V BiCMOS Technology • 12−100 MHz (CY7B993V), or 24−185 MHz (CY7B994V) output operation • 18 3.3V LVTTL outputs

Contextual Info: 94V RoboClockII CY7B994V CY7B993V High-Speed Multi-Phase PLL Clock Buffer Features Functional Description • 12/100-MHz CY7B993V , or 24/200-MHz (CY7B994V) output operation • Matched pair output skew <200 ps • Zero input-to-output delay • 18 LVTTL 50% duty-cycle outputs capable of driving

CY7B993V

Abstract: CY7B993V-5AC CY7B993V-5AI CY7B994V CY7B994V-5AC CY7B994V-5AI
Contextual Info: RoboClockII CY7B994V CY7B993V PRELIMINARY High-Speed Multi-Phase PLL Clock Buffer Features Functional Description • 12/100-MHz CY7B993V , or 24/185-MHz (CY7B994V) output operation • Matched pair outputs skew <200 ps • Zero input-to-output delay • 18 LVTTL 50% duty-cycle outputs capable of driving

Contextual Info: Replace MPC973 with RoboClock II Introduction Cypress CY7B993 and CY7B994 RoboClock II contain a comprehensive feature set that performs a superset of those contained in the Motorola MPC973 and MPC972. Systems that were originally designed around the Motorola part can be

Contextual Info: RoboClock CY7B994V CY7B993V High-speed Multi-phase PLL Clock Buffer Features • 500ps max Total Timing Budget TTB™ window • 12 MHz/100 MHz (CY7B993V), or 24 MHz/200 MHz (CY7B994V) output operation • Matched pair output skew < 200 ps • Zero input-to-output delay

Contextual Info: 1CY7B994V RoboClockII CY7B994V CY7B993V PRELIMINARY High-Speed Multi-Phase PLL Clock Buffer Features Functional Description • 12/100-MHz CY7B993V , or 24/200-MHz (CY7B994V) output operation • Matched pair output skew <200 ps • Zero input-to-output delay

Contextual Info: CY7B993V/CY7B994V RoboClock High Speed Multi Phase PLL Clock Buffer High Speed Multi Phase PLL Clock Buffer Features Functional Description • 500 ps Max Total Timing Budget TTB window ■ 12 MHz to 100 MHz (CY7B993V), or 24 MHz to 200 MHz (CY7B994V) Input/Output Operation

LL3-TB02

Abstract: LL3-DF02 Sensick Sensors DT 500 LL3-DT01 LL3-TA01 LL3-DB01 LL3-TV04 LL3-DV02 LL3-TR01 DOL-0804-G10M
Contextual Info: DB_W160_16-23_en.qxp 26.07.2002 10:16 Uhr Seite 19 LL 3 LL 3 Plastic Fiber-Optic Cables – Flexible in Every Sense of the Word Their great variety is another factor: a total of approximately 50 different models of the LL 3 provide optimum alternatives for almost all applications from optical,

CY7B993V

Abstract: CY7B994V TQFP 100PIN
Contextual Info: ADVANCE INFORMATION PI6C3993, PI6C3994

FBKB

Abstract: CY7B993V CY7B993V-2AC CY7B993V-2AI CY7B994V CY7B994V-2AC 994V
Contextual Info: RoboClock CY7B994V CY7B993V High-speed Multi-phase PLL Clock Buffer Features Functional Description • 500-ps max. Total Timing Budget TTB™ window • 12–100-MHz (CY7B993V), or 24–200-MHz (CY7B994V) input/output operation • Matched pair output skew < 200 ps

WL 27 F430

Abstract: sick optic typ WL 9 sick wl 170 ws 160-F132 BL-160-SK 3TB 44 Sensick Sensors DT 500 sick optic typ WL 9 f430 160-E142 E182 Series
Contextual Info: DB_W 160_Titel_en.qxp 26.07.2002 9:45 Uhr Seite 25 for use in the branches: • Electronic components and circuit board manufacturing ■ Packaging and printing industry ■ Assembly and handling technology ■ Special mechanical engineering ■ Conveyor technology.

COC011

Abstract: CY7B993V CY7B994V JESD22-A114 LCK4993V LCK4994 LCK4994V
Contextual Info: a8e re AdLib OCR Evaluation systems Advance Data Sheet November 2002 LCK4993V/LCK4994V Low-Voltage PLL Clock Drivers Features Description . 12/100 MHz LCK4993V , or 24/200 MHz (LCK4994V) output operation The LCK4993V and LCK4994V low-voltage PLL clock drivers offer user-selectable control over