625PS Search Results

adum3223

Abstract: adum4223 ADP3624 ADP3654 24-Lead LFCSP footprint
Contextual Info: Digital Controller for Isolated Power Supply with PMBus Interface ADP1051 Preliminary Technical Data FEATURES GENERAL DESCRIPTION Versatile, digital voltage mode controller High speed, input voltage feed-forward control 6 PWM logic outputs with 625ps resolution

smd 100uf Cha

Abstract: 5304 smd 8 pin ISPPAC-CLK5308S-01TN48I MBR120VLSFT1G RC0805JR-0710KL 100uF CHA ECS-3953M ic 5304 smd 8 pin SMD 100 6n cap DS1010
Contextual Info: ispClock Family Handbook HB1006 Version 01.4, November 2009 ispClock Family Handbook Table of Contents November 2009 Handbook HB1006 Section I. ispClock Family Data Sheets ispClock5600A Family Data Sheet. 1-1

NS208N

Abstract: ns208
Contextual Info: Frequently Asked Questions about the RoboClockII Family The following questions are frequently asked by customers who are using devices in the RoboClock family. The RoboClockII family consists of the CY7B993V and CY7B994V. The following are brief answers to sometimes complicated questions. More

Micron Designline Vol 8

Abstract: DDR SDRAM designline DQSQ Micron NAND DQS dram ddr 1997 PC266 Micron DDR SDRAM designline 368-3945 ddr designline 1999 ddr designline 1998
Contextual Info: ○ SDR ○ DDR ○ /2N ○ PC100/ SDRAM DRAM ○ ○ 2 SDRAM CK 1 ○ ○ ○ SDR Single Data Rate ○ ○ ○ DDR Double Data Rate SDRAM DDR SDRAM ○ ○ ○ PC133 ○ DDR SDRAM ○ ○ ○ DRAM SDR SDR ○ 2 2 2) DDR SDRAM ○ 3 WRITE DDR 2N ○ READ

5V995

Abstract: IDT5V995
Contextual Info: IDT5V995 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II INDUSTRIAL TEMPERATURE RANGE 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II IDT5V995 ADVANCED INFORMATION FEATURES: DESCRIPTION • • • • The IDT5V995 is a high fanout 3.3V PLL based clock driver intended for

SMPTE 1080p level a

Contextual Info: 0XOWL GEN GF9330 High Performance SDTV/HDTV Deinterlacer PRELIMINARY DATA SHEET DEVICE OVERVIEW • De-interlace, Pass-Through and Film Frame Rate Down Conversion modes of operation The GF9330 is a high performance VDSP engine that performs high quality de-interlacing of interlaced digital

Managing High-Speed Clocks in High-Performance Satellite Systems

Abstract: Clock Management all component symbols backplane design cpci TDS7704B cpci backplane schematic P43-44 UT7R995
Contextual Info: Aeroflex Colorado Springs Page 1 Managing High-Speed Clocks in High-Performance Satellite Systems By Tim Meade, Standard Products Manager, Aeroflex Colorado Springs A s spaceborn applications continue to demand increased bandwidth and performance in their electronic subsystems, the need to manage high-speed

718G

Abstract: 5V9950 IDT5V9950
Contextual Info: IDT5V9950 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II JR. INDUSTRIAL TEMPERATURE RANGE 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II JR. IDT5V9950 PRELIMINARY FEATURES: DESCRIPTION: • • • • The IDT5V9950 is a high fanout 3.3V PLL based clock driver intended

CY7B9945V

Abstract: CY7B9945V-2AXC CY7B9945V-2AXCT CY7B9945V-2AXIT CY7B9945V-5AXC CY7B9945V-5AXCT HWT 09 322f
Contextual Info: RoboClock CY7B9945V PRELIMINARY High Speed Multi-phase PLL Clock Buffer Features Functional Description • 500 ps max Total Timing Budget TTB window ■ 24 MHz –200 MHz input and Output Operation ■ Low Output-output skew <200 ps ■ 10 + 1 LVTTL Outputs driving 50Ω terminated lines

ALI chipset

Abstract: KM266 SIS 650 Via KM266 48MHZ M1671 PLL202-151 ali m1671 KM26
Contextual Info: PRELIMINARY PLL202-151 Programmable Clock Generator for VIA, ALI and SIS DDR SYSTEM FEATURES • • • • • • • • • • • • • Supports VIA P4M/KM266, ALI M1671 and SIS 645/650 Chipsets. Programmable Spread Spectrum Modulation from ±0.1% to ±1.5% with minim u m step size of

Contextual Info: IDT5V9950 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II JR. INDUSTRIAL TEMPERATURE RANGE 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II JR. IDT5V9950 ADVANCED INFORMATION FEATURES: DESCRIPTION: • • • • The IDT5V9950 is a high fanout 3.3V PLL based clock driver intended

Contextual Info: IDT5V996 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II PLUS INDUSTRIAL TEMPERATURE RANGE IDT5V996 PRELIMINARY 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCKTM II PLUS FEATURES: DESCRIPTION: • • • • The IDT5V996 is a high fanout PLL based clock driver intended for high

5V995

Abstract: AN237 IDT5V995
Contextual Info: IDT5V995 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II INDUSTRIAL TEMPERATURE RANGE 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II IDT5V995 FEATURES: DESCRIPTION: • • • • The IDT5V995 is a high fanout 3.3V PLL based clock driver intended for

Contextual Info: RoboClock CY7B9945V PRELIMINARY High Speed Multi-phase PLL Clock Buffer Features Functional Description • 500 ps max Total Timing Budget TTB window ■ 24 MHz –200 MHz input and Output Operation ■ Low Output-output skew <200 ps ■ 10 + 1 LVTTL outputs driving 50Ω terminated lines

hc322

Abstract: EP3C5 EP4SE230 HC371 LVDS_RX EP3SE50 EP4SE530 HC210 receiver LVDS_rx EP2AGX190
Contextual Info: Quartus II Software Device Support Release Notes RN-01045-1.0 May 2009 This document provides late-breaking information about device support in this version of the Altera Quartus® II software. For information about disk space and system requirements, refer to the readme.txt file in your altera/<version number>/quartus directory.

EP2AGX190

Abstract: EP3CLS200 EP2AGX125 EP4SE230 EP4SE530 EP2AGX260 HC210 EP2AGX45 EP3CLS150 EP3CLS70
Contextual Info: Quartus II Software Device Support Release Notes RN-01047-1.0 June 2009 This document provides late-breaking information about device support in this version of the Altera Quartus® II software. For information about disk space and system requirements, refer to the readme.txt file in your altera/<version number>/quartus directory.

2DS1

Abstract: CY7B993V CY7B994V 24185
Contextual Info: RoboClockII CY7B994V ADVANCED INFORMATION CY7B993V High-Speed Multi-Phase PLL Clock Buffer Features • Matched pair outputs skew <200 ps 200 ps MAX • 3.3V BiCMOS Technology • 12−100 MHz (CY7B993V), or 24−185 MHz (CY7B994V) output operation • 18 3.3V LVTTL outputs

5V9950

Abstract: IDT5V9950
Contextual Info: IDT5V9950 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II JR. INDUSTRIAL TEMPERATURE RANGE 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II JR. IDT5V9950 ADVANCED INFORMATION FEATURES: DESCRIPTION: • • • • The IDT5V9950 is a high fanout 3.3V PLL based clock driver intended

CHL8318

Abstract: ASP1212
Contextual Info: Digital Multi-Phase Buck Controller FEATURES DESCRIPTION • Intel VR11.x compliant Digital PWM Controller  Programmable 1-phase to 8-phase operation  Customized Digital Over-Clocking features an easy-to-use SMBus Gamer command and a Gamer VID control up to 2.3V, Gamer Vmax,

Contextual Info: IDT5V9950 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II JR. INDUSTRIAL TEMPERATURE RANGE 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II JR. FEATURES: • • • • DESCRIPTION: Ref input is 5V tolerant 4 pairs of programmable skew outputs

5V995

Abstract: IDT5V995
Contextual Info: IDT5V995 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II INDUSTRIAL TEMPERATURE RANGE 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II IDT5V995 PRELIMINARY FEATURES: DESCRIPTION • • • • The IDT5V995 is a high fanout 3.3V PLL based clock driver intended for

GF9330

Abstract: GF9330-CBP GF9331 GS9021 ieee format for w16 engine SMPTE 296M smpte 274m image enhancer
Contextual Info: 0XOWL GEN GF9330 High Performance SDTV/HDTV Deinterlacer PRELIMINARY DATA SHEET DEVICE OVERVIEW • De-interlace, Pass-Through and Film Frame Rate Down Conversion modes of operation The GF9330 is a high performance VDSP engine that performs high quality de-interlacing of interlaced digital

5V9950

Abstract: IDT5V9950
Contextual Info: IDT5V9950 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II JR. INDUSTRIAL TEMPERATURE RANGE 3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK II JR. IDT5V9950 FEATURES: DESCRIPTION: • • • • The IDT5V9950 is a high fanout 3.3V PLL based clock driver intended

B2F1

Abstract: 5V9955 AN237 IDT5V9955 ML51
Contextual Info: IDT5V9955 3.3V PROGRAMMABLE SKEW DUAL PLL CLOCK DRIVER TURBOCLOCK W INDUSTRIAL TEMPERATURE RANGE 3.3V PROGRAMMABLE SKEW DUAL PLL CLOCK DRIVER TURBOCLOCK W IDT5V9955 FEATURES: DESCRIPTION • • • • The IDT5V9955 is a high fanout 3.3V PLL based clock driver intended