1K X 8 STATIC RAM Search Results

cy7c136

Abstract: EME-6300H CY7C13X
Contextual Info: Qualification Report January 1996 QTP# 95152/95487, Version 1.0 2K/1K x 8 Dual-Port Static RAM MARKETING PART NUMBER DEVICE DESCRIPTION CY7C130/131 1K x 8 Dual-Port Static RAM CY7C140/141 1K x 8 Dual-Port Static RAM CY7C132/142 2K X 8 Dual-Port Static RAM

MK4118

Abstract: MK4118A-2 MK4118A MOSTEK ROM mk4801
Contextual Info: MOSTEK MEMORY COMPONENTS 1K x 8-Bit Static RAM MK4118A/M K4801 A P /J/N Series FEATURES □ MKB version screened to MIL-STD-883 □ Static operation Part No. □ Organization: 1K x 8 bit RAM JEDEC pinout Access Time R /W Cycle Time □ High performance

7C130

Abstract: 7c131 CY7C130 CY7C131 CY7C140 CY7C141 CY7C131-55JXC CY7C131-55NXC MIL-STD-183 Z1014
Contextual Info: CY7C130, CY7C130A CY7C131, CY7C131A 1K x 8 Dual-Port Static RAM Features Functional Description The CY7C130/130A/CY7C131/131A/CY7C140[1] and CY7C141 are high speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in

Contextual Info: HD30 • HD40 ADP I SRAM o 5 Volt x8 Dual-Port Static RAM Memory Configuration Device 1K x 8 HD30 1K x 8 HD40 Key Features: • • • • • • • • • Industry leading Dual-Port Static RAM up to 15ns Simultaneous memory access through two ports 5V power supply

United Technologies Mostek

Abstract: MOSTEK MEMORY MK4801 MK4801A-1 17dq7 MK4801A MK4801A-2 MK4801A-3 MK4801A-4 MOSTEK ROM
Contextual Info: UNITED TECHNOLOGIES % l# MOSTEK ^ s \l// MEMORY COMPONENTS 1K x 8-BIT STATIC RAM M K4801A P/J/N -1 /2/3/4 FEATURES □ MKB version screened to MIL-STD-883 □ Static operation Part No. □ Organization: 1K x 8 bit RAM JEDEC pinout R /W Access Time R /W Cycle Time

B1317

Abstract: B1318 b1319 b1316 B1314 CY7B131
Contextual Info: CY7B131 CY7B141 1K x 8 DualĆPort Static RAM output enable OE . BUSY flags are proĆ Features Functional Description D The CY7B131 and CY7B141 are highĆ speed BiCMOS 1K by 8 dualĆport static RAMS. Two ports are provided to permit independent access to any location in

7C131

Abstract: TwB 75 CY7C131-15JXI 1K x 4 static ram ttl CY7C141 7C130 CY7C130 CY7C131 CY7C140 7c130-55
Contextual Info: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports

7C13135

Abstract: CY7C140-35PC 7C130 CY7C130 CY7C131 CY7C140 CY7C141
Contextual Info: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports

7C13135

Abstract: CY7C131 CY7C141-25JXC
Contextual Info: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports

C1303

Abstract: CY7C131 CY7C130 CY7C140 CY7C141
Contextual Info: 40 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power

AL5DA002

Abstract: AL5DA003 AL5DA132
Contextual Info: AverLogic Technologies Corp. Asynchronous Dual Port Static RAM AL5DAxxxx-Selection Guide VCC NO Part number Configuration Arbitration Logic Busy Interrupt Semaphore M/S mode 1. AL5DA002-x-30-J52 1K x 8 V V M 2. AL5DA002-x-30-PF64 1K x 8 V V M 3. AL5DA002-x-30-TF64

CY7C131

Abstract: CY7C130 CY7C140 CY7C141 IDT7130 IDT7140 C1303 C1307
Contextual Info: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 DualĆPort Static RAM D Features D D D D speed/power Functional Description Automatic powerĆdown The CY7C130/CY7C131/CY7C140 and CY7C141 are highĆspeed CMOS 1K by 8 dualĆport static RAMs. Two ports are proĆ vided permitting independent access to

3246A

Contextual Info: fax id: 5200 CY7C130/CY7C131 CY7C140/CY7C141 CYPRESS 1K x 8 Dual-Port Static RAM Functional Description Features True Dual-Ported memory ceils which allow simulta­ neous reads of the same memory location 1K x 8 organization 0.65-micron CMOS for optimum speed/power

PLCC-52

Abstract: CY7C130 CY7C131 CY7C140 CY7C141 CY7C131-25JC CY7C131-35J Z1014
Contextual Info: CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1K x 8 organization ■ 0.65 micron CMOS for optimum speed and power

a26c

Abstract: 1K x 8 static ram 1k BIT WORD STATIC RAM MOSTEK MEMORY MOSTEK ROM MK4801A-90 Mostek MK4801 MK4801A Bipolar ROM 1K X 4
Contextual Info: MQSTEK 1K x 8-BIT STATIC RAM MK4801 A P /J /N Series □ High perform ance FEATURES □ Static operation Part No. Access Time □ Organization: 1K x 8 bit RAM JEDEC pinout □ Pin com patible w ith M ostek's BYTEWYDE m em ory fam ily □ 2 4 /2 8 pin R O M /P R O M com patible pin configuration

Contextual Info: fax id: 5200 CY7C130/CY7C131 CY7C140/CY7C141 W CYPRESS 1K x 8 Dual-Port Static Ram Features Functional Description True Dual-Ported memory cells which allow simulta­ neous reads of the same memory location 1K x 8 organization 0.65-micron CMOS for optimum speed/power

893Q

Abstract: CY7C131-55JI bit-slice t913 CY7C1312
Contextual Info: fax id: 5200 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Featu res Functional Description • True Dual-Ported memory cells which allow sim ulta­ neous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power

CY7C130

Abstract: CY7C131 CY7C140 CY7C141
Contextual Info: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 15 ns

C1307

Abstract: cY7c131 I CY7C130 CY7C131 CY7C140 CY7C141 C130-15 C1303 C13017
Contextual Info: fax id: 5200 1CY 7C14 0 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power

C1303

Abstract: CY7C130 CY7C131 CY7C140 CY7C141 7c130 CY7C131-35JC C1307
Contextual Info: fax id: 5200 1CY 7C14 0 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power

Contextual Info: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 15 ns

Zl14

Abstract: C1306 cy7c130-55pc CY7C130 CY7C131 CY7C140 CY7C141 C1303
Contextual Info: fax id: 5200 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Functional Description Features • True Dual-Ported memory cells which allow sim ulta­ neous reads of the sam e memory location • 1K x 8 organization • 0.65-micron CMOS fo r optimum speed/power

52001HR

Abstract: IN3064 1K x 4 static ram ttl
Contextual Info: 52001 H 1K BIT 128 x 8 NVRAM Q 1K Bit Static RAM backed by 1K Bit Electrically Erasable PROM Fully 5V Only Operation Directly TTL Compatible In Circuit EEPROM Changes SRAM Cycle Time less than 300 ns Power-Failure Protection Unlimited Recall Cycles Memory Margining Capability

5200 CY7C131 1K x 8 Dual-Port Static RAM

Abstract: CY7C130 CY7C131 CY7C140 CY7C141
Contextual Info: fax id: 5200 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Functional Description Features • True Dual-Ported memory cells which allow sim ulta­ neous reads of the sam e memory location • 1K x 8 organization • 0.65-micron CMOS fo r optimum speed/power