16K X 8 Search Results

CY7C006A

Abstract: CY7C007A CY7C016A CY7C017A CY7C006A-20AXI
Contextual Info: CY7C006A CY7C007A CY7C017A32K/16K x 8, 16K x 9 Dual-Port Static RAM CY7C006A/CY7C007A CY7C016A/CY7C017A 32K/16K x 8, 16K x 9 Dual-Port Static RAM Features • Automatic power-down • True dual-ported memory cells which allow simultaneous access of the same memory location

Contextual Info: FAMILY OF HIGH PERFORMANCE CMOS PROMs AND RPROMs PART NUMBER PAGE NO. DENSITY BITS W S57C 191B 2-7 16K W S57C 191C W S 5 7C 291 B W S 5 7C 291 C W S 5 7C 45 2-13 2-7 2-13 2-19 16K 16K 16K 16K ARCHITECTURE 2K 2K 2K 2K 2K X X X X X 8 8 8 8 8 SPEED (NS) DRAWING

ftr 02

Abstract: F.TR.02 19 IDT BH package marking marking a7r
Contextual Info: AL5DS9xx9V Data Sheets 3.3V Synchronous Dual-Port SRAM AL5DS9349V/59V/69V/79V/89V 4K/8K/16K/32K/64K x 18 AL5DS9269V/79V/89V 16K/32K/64K x 16 AL5DS9149V/59V/69V/79V/89V/99V 4K/8K/16K/32K/64K/128K x 9 AL5DS9069V/79V/89V/99V 16K/32K/64K/128K x 8 Preliminary AL5DS9xx9V

CY7C006A

Abstract: CY7C007A CY7C016A CY7C017A
Contextual Info: CY7C006A CY7C007A CY7C017A32K/16K x 8, 32K x 9 Dual-Port Static RAM CY7C006A/CY7C007A CY7C016A/CY7C017A 32K/16K x8, 32K/16K x9 Dual-Port Static RAM Features • True dual-ported memory cells which allow simultaneous access of the same memory location • 16K x 8 organization CY7C006A

Contextual Info: AL5DS9xx9V AL5DS9xx9V Data Sheets 3.3V Synchronous Dual-Port SRAM AL5DS9349V/59V/69V/79V 4K/8K/16K/32K x 18 bits AL5DS9269/79V 16K/32K x 16 bits AL5DS9159/69/79/89V 8K/16K/32K/64K x 9 bits AL5DS9069/79/89V 16K/32K/64K x 8 bits Preliminary 2002~3-Copyright by AverLogic Technologies, Corp.

3VR10

Abstract: AL5DS9289V AL5DS9389V marking a0l
Contextual Info: AL5DS9xx9V AL5DS9xx9V Data Sheets 3.3V Synchronous Dual-Port SRAM AL5DS9349V/59V/69V/79V 4K/8K/16K/32K x 18 bits AL5DS9269/79V 16K/32K x 16 bits AL5DS9149/59/69/79/89V 4K/8K/16K/32K/64K x 9 bits AL5DS9069/79/89V 16K/32K/64K x 8 bits Preliminary 2002-Copyright by AverLogic Technologies, Corp.

cmos SRAM 35ns 8k X 8 dip

Abstract: 7C166 CY7C161 CY7C162 CY7C164 CY7C166 CY7C185 CY7C186 CY7C187 7C164
Contextual Info: Qualification Report January 1992 QTP 91094 64K SRAM FAMILY MARKETIN G DEVICE PART NBR DESCRIPTION CY7C161 16K x 4 SIO CY7C162 16K x 4 (SIO) CY7C164 16K x 4 CY7C166 (OE) CY7C185 8K x 8 CY7C186 8K x 8 (.6 DIP) CY7C187 64K x 1 Version 1.2 PRODUCT DESCRIPTION (for qualification)

Contextual Info: CY7C460 CY7C462 CY7C464 PRELIMINARY CYPRESS SEMICONDUCTOR Cascadable 8K x 9 FIFO Cascadable 16K x 9 FIFO Cascadable 32Kx9FIFO Features Functional Description • 8K x 9 , 16K x 9 , 32K x 9 FIFO buffer memory T h e CY7C460, CY7C462, and CY7C464 are respectively, 8K, 16K, and 32K w ords

Contextual Info: CY7C460 CY7C462 CY7C464 PRELIM INARY p y p p rc c Cascadeable 8K x 9 FIFO Cascadeable 16K x 9 FIFO Cascadeable 32K x 9 FIFO Features Functional Description • 8K x 9, 16K x 9, 32K x 9 FIFO buffer memory The CY7C460, CY7C462, and CY7C464 arc respectively, 8K, 16K, and 32K words

A12L

Abstract: A13L CY7C006 CY7C016 TSOP 48 memory arbitration scheme C0066
Contextual Info: with Sem, In t, Busy CY7C006 CY7C016 16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features • True dual-ported memory cells which allow simultaneous reads of the same memory location • 16K x 8 organization CY7C006 • 16K x 9 organization (CY7C016)

A12L

Abstract: A13L CY7C006 CY7C016 C0066
Contextual Info: with Sem, In t, Busy CY7C006 CY7C016 16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 16K x 8 organization CY7C006 • 16K x 9 organization (CY7C016)

CY7C006

Abstract: CY7C016
Contextual Info: fax id: 5207 1 CY7 C0 16 CY7C006 CY7C016 16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 16K x 8 organization CY7C006 • 16K x 9 organization (CY7C016)

CYM1821

Abstract: 18216
Contextual Info: CYM1821 16K x 32 Static RAM Module Features D D D HighĆdensity 512ĆKbit SRAM module The D D D D is a highĆperformance densities from 16K x 32 through 16K words by 32 bits. This module is conĆ 1M x 32 structed from eight 16K x 4 SRAM SOJ packages HighĆspeed CMOS SRAMs

"Dual-Port RAM" for video applications

Abstract: "32K x 16" dual port SRAM sram with address counter 3.3v counter
Contextual Info: AL5DS9xx9V 3.3V Synchronous Dual-Port SRAM 4K/8K/16K/32K/64K/128K x 8/9/16/18-bit Features True dual ported memory cells 17 Flow-Through/Pipelined devices: - 4K/8K/16K/32K/64K x 18-bit organization AL5DS9349V/59V/69V/79V/89V - 16K/32K/64K x 16-bit organization (AL5DS9269V/79V/89V)

SEM 2005 16 PINS

Abstract: sem 2005 CYPRESS CROSS REFERENCE dual port sram sem 2005 16 pin CY7C006A CY7C007A CY7C016A CY7C017A TPD16-3
Contextual Info: CY7C006A CY7C007A CY7C017A32K/16K x 8, 32K x 9 Dual-Port Static RAM CY7C006A/CY7C007A CY7C016A/CY7C017A 32K/16K x8, 32K/16K x9 Dual-Port Static RAM Features • Automatic power-down • True dual-ported memory cells which allow simultaneous access of the same memory location

LSI403US

Abstract: 8054 8054 micro processor ZSP400
Contextual Info: LSI403US Digital Signal Processor Ultra-Sleek Package 7mm x 7mm 5 PLL Boot RAM 1K x 16 Instruction Unit A Instruction Memory 16K x 16 Internal DI 32 Memory Configurable Memory Controller 16K x 16 rdA wrA Data Memory 64 DO 16K x 16 DI 32 16 16 DMA Controller

Contextual Info: ^ n n i i y U I^ IV DPS129 Dense-Pac Microsystems, Inc. 0 16K X 8 CM OS SRAM M ODULE NOT RECOMENDED FOR NEW DESIGNS DESCRIPTION: The DPS129 is a 16K X 8 Static Random Access Memory SRAM module using 8 CM OS 16K X 1 SRAMs. The memory utilizes asynchronous circuitry

c0067

Abstract: A13L CY7C006 CY7C016 IDT7006 IDT7016
Contextual Info: CY7C006 CY7C016 PRELIMINARY 16K x 8/9 DualĆPort Static RAM with Sem, Int, Busy Features Functional Description D D The CY7C006 and CY7C016 are highĆ speed CMOS 16K x 8 and 16K x 9 dualĆ port static RAMs. Various arbitration schemes are included on the CY7C006/016 to handle situations when

Contextual Info: DPS129 □PM Dense-Pac Microsystems, Inc. ^ 16K X 8 CMOS SRAM MODULE NOT RECOMENDED FOR NEW DESIGNS D E S C R IP T IO N : The DPS 129 is a 16K X 8 Static Random Access Memory SRAM module using 8 C M O S 16K X 1 SRAMs. The memory utilizes asynchronous circuitry

PM12C

Contextual Info: fax id: 20 10 CYM1821 16K x 32 Static RAM Module Features • High-density 512-Kbit SRAM module • 32-bit standard footprint supports densities from 16K x 32 through 1M x 32 • High-speed CMOS SRAMs constructed from eight 16K x 4 SRAM SOJ packages mount­

Contextual Info: DPS129 □PM Dense-Pac Microsystems, Inc. ^ 16K X 8 C M O S SRAM MODULE NOT RECOMENDED FOR NEW DESIGNS DESCRIPTION: The DPS129 is a 16K X 8 Static Random Access Mem ory SRAM module using 8 CMOS 16K X 1 SRAMs. The memory utilizes asynchronous circuitry and may be maintained in any state for an indefinite

CY7C460-25JC

Abstract: DD107B CY7C460 CY7C462 CY7C464 IDT7205 IDT7206 CY7C460-40JC CY7C464-15PI
Contextual Info: fc.SE ]> • SSÖlbbS D01D7SS TOS ICYP CYPRESS SEMICONDUCTOR PRELIMINARY CYPRESS SEMICONDUCTOR Cascadable 8K x 9 FIFO Cascadable 16K x 9 FIFO Cascadable 32K x 9 FIFO Features Functional Description • 8K x 9 , 16K x 9 ,32K x 9 FIFO buffer memory • Asynchronous read/write

sumitomo silver epoxy

Abstract: EME-6300H 92361 CY7C460 CY7C462 CY7C464 CY7C470 CY7C472 CY7C474 0.8um cmos
Contextual Info: Qualification Report June, 1994, QTP# 92361 Version 1.1 CY7C46X/47X, MINNESOTA FAB MARKETING PART NUMBER DEVICE DESCRIPTION CY7C460 Cascadable 8K x 9 FIFO CY7C462 Cascadable 16K x 9 FIFO CY7C464 Cascadable 32K x 9 FIFO CY7C470 8K x 9 FIFO CY7C472 16K x 9 FIFO

64 CERAMIC LEADLESS CHIP CARRIER LCC

Abstract: CY7C162 L7C162CC12 L7C162CC15 L7C162CC20 L7C162PC12 L7C162PC15 L7C162PC20
Contextual Info: L7C162 L7C162 DEVICES INCORPORATED 16K x 4 Static RAM 16K x 4 Static RAM DEVICES INCORPORATED FEATURES DESCRIPTION q 16K x 4 Static RAM with Separate I/O and High Impedance Write q Auto-Powerdown Design q Advanced CMOS Technology q High Speed — to 12 ns maximum