1690H Search Results

progressive scan CCD

Abstract: CXD3618R ICX284 ICX454DQ ICX454DQF
Contextual Info: Progressive Scan 2.04M-Pixel Diagonal 6.72 mm Type 1/2.7 Digital Still Camera CCD ICX454DQ ICX454DQF The trend towards diversification in the digital still camera market is accelerating. In addition to the current ICX284 Series (frame readout 2.02M-pixel diagonal 6.64

09-D2

Abstract: RGB565 to rgb888 epson 16F8H T-1228 S2D13719 T-1227 Casio 1026 casio tft T14-22 T1205A
Contextual Info: S2D13719 Mobile Graphics Engine Hardware Functional Specification Document Number: X59A-A-002-01 Status: Revision 1.2 Issue Date: 2008/10/27 SEIKO EPSON CORPORATION 2008. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in

A6799-01

Abstract: A6799 bus arbitration protocol circuit diagram of rc transmitter and receiver I2C-bus specification 3 A6803
Contextual Info: I2C Bus Interface Unit 22 This chapter describes the I2C Inter-Integrated Circuit bus interface unit of the i960 RM/RN I/O Processor, including the operation modes and setup. Throughout this manual, this peripheral is referred to as the I2C unit. 22.1

HTR resistors

Abstract: 80960 80960SA reference i960 RP Processor 80960JF STT 433 1250H clock generator in dual core processor i960 Cx Instruction Set Quick Reference i960 Cx Processor Instruction Set Quick Reference
Contextual Info: i960 RP Microprocessor User’s Manual i960® RP Microprocessor User’s Manual February 1996 Order Number: 272736-001 Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for

80960

Abstract: BO 620 bbc timer stt 11 c17f i960 Cx Processor Instruction Set Quick Reference i960RP 80960JF 80960RD 80960RP MA11
Contextual Info: i960 Rx I/O Microprocessor Developer’s Manual Release Date: April, 1997 Order Number: 272736-002 The i960® Rx I/O Processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Such errata are

IT8511

Abstract: IT8512 IT8510 IT851 IT85 APM 6658 IT858 IT8511E 710419 8042 keyboard matrix 16*8
Contextual Info: IT8511E/TE/G Embedded Controller Preliminary Specification 0.4.1 ITE TECH. INC. Specification subject to Change without notice, AS IS and for reference only. For purchasing, please contact sales representatives. Copyright 2006 ITE Tech. Inc. This is Preliminary document release. All specifications are subject to change without notice.

1N44H

Abstract: 1a5ah 1178H 1N60H 1171H 1A86H 0m02 1b7ah 19C1H 1N14H
Contextual Info: SONET/SDH Payload Extractor/Aligner SPECTRA-4x155 Production PM5316 SPECTRA 4x155 SONET/SDH Payload Extractor/Aligner 4 x 155 Mbit/s Datasheet Proprietary and Confidential Production Issue 4: March 2001 Proprietary and Confidential to PMC-Sierra, Inc. and for its customers’ internal use

s1d13715

Abstract: 1066H LCD sharp 320X320 T-1228 T-1227 phone 14 pin vga camera pinout T1128 T1429 1520H RGB565 to rgb888 epson
Contextual Info: S1D13715 Mobile Graphics Engine with Megapixel Support Hardware Functional Specification Document Number: X52A-A-001-07 SEIKO EPSON CORPORATION 2002-2008. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in

a8293

Abstract: A8294 A8264 PC 1498H 1250H a8296 BA RV cb rv 1050H REQ64
Contextual Info: Intel 80312 I/O Companion Chip Developer’s Manual December 2000 Order Number: 273410-002 Intel® 80312 I/O Companion Chip Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual

LB 124 d

Abstract: BH RV transistor i960 Cx Processor Instruction Set Quick Reference 80960JT 80960RM 80960RN REQ64 BIT3102 273160 80960
Contextual Info: i960 RM/RN I/O Processor Developer’s Manual July 1998 Order Number: 273158-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability

Contextual Info: PM Quad Clock Recovery and Synthesis Unit for 2488 Mbit/s Preliminary De ce m be r, 20 02 01 :5 3: 22 PM5395 n Tu es da y, 03 CRSU-4x2488 Data Sheet Proprietary and Confidential Preliminary Issue 4: October, 2002 Do wn lo ad ed by Pa rtM i ne rI nc of Pa rtm

diode K1V 452

Abstract: 09CCH 09E0H 09A1H 0943H 09C8 0951H 05C1H 1488h K1V 40 N
Contextual Info: SPECTRA-2488 Telecom Standard Product Data Sheet Released PM5315 SPECTRA-2488 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 2488 MBIT/S Data Sheet Proprietary and Confidential Released Issue 4: November, 2001 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

AT49BV004

Abstract: AT49BV004T AT49BV4096A AT49BV4096AT ut000 4096A
Contextual Info: Features • • • • • • • • • • 2.7V to 3.6V Read/Write Operation Fast Read Access Time - 120 ns Internal Erase/Program Control Sector Architecture – One 8K Words 16K bytes Boot Block with Programming Lockout – Two 4K Words (8K bytes) Parameter Blocks

AT49F4096A

Abstract: AT49F4096AT AT49F004 AT49F004T 4096A
Contextual Info: Features • Single Voltage Operation • • • • • • • • • – 5V Read – 5V Programming Fast Read Access Time - 55 ns Internal Erase/Program Control Sector Architecture – One 8K Words 16K bytes Boot Block with Programming Lockout – Two 4K Words (8K bytes) Parameter Blocks

tt6061

Abstract: dh6af pm3388fi PM3011 31ab marking PM3388H-FI
Contextual Info: 8: 20 PM S/UNI10xGE Telecom Standard Product Data Sheet Released ru sd ay ,0 7F eb S/UNI 10xGE ar y, 20 07 06 :5 PM3388 In co n W ed ne Ten-Port Gigabit Ethernet Controller Proprietary and Confidential Released Issue No. 8: January, 2007 Do wn l oa de d by

PM8388

Abstract: 200WN
Contextual Info: 0: 14 PM S/UNI10xGE Telecom Standard Product Data Sheet Released Mo nd ay ,1 3M ar S/UNI 10xGE ch ,2 00 6 10 :1 PM3388 rtm in er In co n Ten-Port Gigabit Ethernet Controller Proprietary and Confidential Released Issue No. 7: February 2006 Do wn l oa de d by

AT49F004

Abstract: AT49F004T AT49F4096A AT49F4096AT 4096A
Contextual Info: Features • Single Voltage Operation • • • • • • • • • – 5V Read – 5V Programming Fast Read Access Time - 55 ns Internal Erase/Program Control Sector Architecture – One 8K Words 16K bytes Boot Block with Programming Lockout – Two 4K Words (8K bytes) Parameter Blocks

1690H

Abstract: 79XXX 4096A 3DXXX
Contextual Info: Features * * * * * * * * * * 2.7V to 3.6V Read/Write Operation Fast Read Access Time -120 ns Internal Erase/Program Control Sector Architecture - One 8K Words 16K bytes Boot Block with Programming Lockout - Two 4K Words (8K bytes) Parameter Blocks - One 240K Words (480K bytes) Main Memory Array Block

49F004

Abstract: 49f004t 4096A
Contextual Info: Features * Single Voltage Operation - 5V Read - 5V Programming * Fast Read Access Time - 55 ns * Internal Erase/Program Control * Sector Architecture - One 8K Words 16K bytes Boot Block with Programming Lockout - Two 4K Words (8K bytes) Parameter Blocks

diode K1V 645

Abstract: 0923H 0A68H 1031f 09-D2 1182h 1488h ya11 PM5332-BI 1221H
Contextual Info: 28 AM SPECTRA 1x2488 ASSP Telecom Standard Product Data Sheet Released be r, 20 03 02 :5 7: PM5332 da y, 14 Oc to SPECTRA™ 1x2488 Data Sheet Released Issue No. 3: March 2003 lo ad ed by Am r Ma ns ou ro fS ilic on Ex pe rt Te cn ol og yI nc on Tu es SONET/SDH Payload Extractor/Aligner

1C65H

Abstract: 1a5ah
Contextual Info: :5 6: 55 AM SPECTRA 4x155 ASSP Telecom Standard Product Data Sheet Released m be r, 20 05 12 PM5316 es da y, 13 De ce SPECTRA 4x155 Data Sheet Released Issue No. 6: November 2005 Do wn lo ad ed by Co nt e nt Te a m of P ar tm in er In co n Tu SONET/SDH Payload Extractor/Aligner

8424h

Abstract: 1488h 1250H 103DH 1428H 1484H 1118H 8620H 1278H 8420H
Contextual Info: Memory-Mapped Registers C This chapter describes the memory-mapped registers for the integrated peripherals. C.1 Overview The Peripheral Memory-Mapped Register PMMR interface gives software the ability to read and modify internal control registers. Each register is accessed as a memory-mapped 32-bit register

DSP56000 motorola

Abstract: CD106 analog front-end tl072 equivalent Crystal, 3.6864MHz CD102 OP270 Germany Recursive Filter Basic joel huloux 3D88 44-PIN
Contextual Info: APPLICATION NOTE ST7544 - UNIVERSAL ANALOG FRONT-END By Joël HULOUX SUMMARY Page I. I.1. I.2. ST7544. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1128H

Abstract: 1188H 12-Bit Parallel-IN Serial-OUT Shift Register
Contextual Info: 4: 05 AM CRSU 4x2488 Telecom Standard Product Data Sheet Released da y, 07 Ja nu ar y, 20 03 08 :3 PM5395 er In co n Tu es CRSU™ 4x2488 Data Sheet Released Issue 5: December, 2002 Do wn lo ad ed by Pa rtM in er I nc of Pa rtm in Quad Clock Recovery and Synthesis