0M02 Search Results

CEB15

Contextual Info: PC Card I/O PCB Connector, 32 Position, Male Part Number • RMC-E32MY-0M02-A3B3 -Offset No symbol: 0 mm OM02 : 0.2 mm OM03 : 0.3 mm OM06 : 0.6 mm -Key position designations A1 : Reserved A type A2: PCMCIA open system LAN (A type) A3: Available (A type)

DM024

Contextual Info: ANALOG DEVICES 32/40-Bit IEEE Floating-Point DSP Microprocessor □ ADSP-21020 1.1 Scope. This specification covers the detail requirements for a monolithic CMOS 32/40-bit floating-point DSP microprocessor. 1.2 Part Number. The complete pan number per Table 1 of this specification is as follows:

0m02

Abstract: 4G TECHNOLOGY ndi2 F880 IBM3221L0572
Contextual Info: â IBM Packet Routing Switch PRS28.4G Version 1.7 Datasheet â Copyright and Disclaimer  Copyright International Business Machines Corporation 1999, 2000, 2001. All Rights Reserved Printed in the United States of America February 2001 The following are trademarks of International Business Machines Corporation in the United States, or other countries, or both.

Contextual Info: MOSEL VITELIC V63C31321024 32K X 32 CMOS SYNCHRONOUS BURST PIPELINED SRAM PRELIMINARY Features Functional Description • ■ ■ ■ ■ ■ ■ ■ ■ The V63C31321024 is a high-speed synchro­ nous burst pipelined CMOS SRAM organized as 32,768 words by 32 bits that supports both ¡486/

RISCwatch

Abstract: ppc jtag
Contextual Info:  IBM Power Network Processor, Resource Manager NPr2.7 Databook Preliminary  Copyright and Disclaimer  Copyright International Business Machines Corporation 1999, 2000 All Rights Reserved Printed in the United States of America July 2000 The following are trademarks of International Business Machines Corporation in the United States, or other countries,

PMD4m

Abstract: pmd23 A0335 G03327 ADSP-21020 ADSP-2100 ADSP-21000 TSW161 PMD24 PMD32
Contextual Info: . ANALOG DEVICES INC OßlbBOO 0033252 5 I ¡ANA 4LE ]> -r-V9-/z-û<? IEEE Floating-Point DSP Microprocessor ANALOG DEVICES FUNCTIONAL BLOCK DIAGRAM FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance

Contextual Info:  IBM Processor for Network Resources Version 2.61 Databook Preliminary  Copyright and Disclaimer  Copyright International Business Machines Corporation 1999, 2000 All Rights Reserved Printed in the United States of America May 2000 The following are trademarks of International Business Machines Corporation in the United States, or other countries,

0m02

Abstract: AS1213 AS1200 AS1200-M3 AS1000 AS1000-M3 AS12 AS1400-M3
Contextual Info: 3-12 FLOW CONTROL EQUIPMENT SPEED CONTROLLERS S U P E R C O M PA C T B O D Y P O R T E D M E TA L I N L I N E /E L B O W T Y P E S AS1000-M3 AS1200-M3 AS1400-M3 Flow Control Equipment S u p e r- c o m p a c t s i z e a n d l i g h t w e i g h t P ro p o r t i o n a l s p e e d c o n t ro l : To 2 0 ᐉ / m i n A N R

1N44H

Abstract: 1a5ah 1178H 1N60H 1171H 1A86H 0m02 1b7ah 19C1H 1N14H
Contextual Info: SONET/SDH Payload Extractor/Aligner SPECTRA-4x155 Production PM5316 SPECTRA 4x155 SONET/SDH Payload Extractor/Aligner 4 x 155 Mbit/s Datasheet Proprietary and Confidential Production Issue 4: March 2001 Proprietary and Confidential to PMC-Sierra, Inc. and for its customers’ internal use

ALU IC 74181 circuit diagram

Abstract: sulzer s7 ram 74189 74189 ram 512x16Bit 74189 ram 16 ALU IC 74181 ALU IC 74181 FUNCTION TABLE Ic 7485 comparator function table 4-bit even parity using mux 8-1
Contextual Info: LC A 10 0 K C o m p acte d A r r a y Plus Eva lu a tio n D e vic e T ST LOGIC Preliminary Introduction The LCA100K HCMOS Evaluation Array contains a variety of common logic functions that allow a user to evaluate the performance of the LCA100K Com­ pacted Array Plus™ series from LSI Logic Corpora­

Contextual Info: IBM25CPC710AB3A100 IBM Dual Bridge and Memory Controller Features • • • • • • • • • • • • • • Up to 100 MHz PowerPC 60x 64-bit bus Supports 100 MHz SDRAM including PC100 I/O for up to 2 MB 8-bit flash ROM 32-bit 33 MHz/64-bit 33-66 MHz async dual bus

Contextual Info: IBM3209K4060 IBM 28.4G Packet Routing Switch Features • Non-blocking, self-routing, single-stage switch • High Performance: - 100 MHz to 111.1 MHz frequency operation - 1.77 Gb/s throughput per port 16x16 config. - Up to 3.54Gb/s throughput per port (8x8 con­

x0606

Abstract: IBM32NPCXXEPABBF66 4z57 SA 6356 ci 4009 0L12D 30G13 3114 sops lc fp603 X1078
Contextual Info:  IBM PowerNP NPr2.7 Datasheet Preliminary February 26, 2002  0.1 Copyright and Disclaimer  Copyright International Business Machines Corporation 1999, 2000, 2001, 2002 All Rights Reserved Printed in the United States of America February 2002 The following are trademarks of International Business Machines Corporation in the United States, or other countries,

IBM32NPCXX1EPABBE66

Abstract: IBM processor of relay RAS 0510 DC RISCwatch
Contextual Info:  IBM Processor for Network Resources Version 2.61 Databook Preliminary  Copyright and Disclaimer  Copyright International Business Machines Corporation 1999, 2000 All Rights Reserved Printed in the United States of America July 2000 The following are trademarks of International Business Machines Corporation in the United States, or other countries,

TFB 4132

Contextual Info:  IBM 28.4G Packet Routing Switch Version 1.7 Databook  Copyright and Disclaimer  Copyright International Business Machines Corporation 1999, 2000. All Rights Reserved Printed in the United States of America June 2000 The following are trademarks of International Business Machines Corporation in the United States, or other countries, or both.

0m02

Abstract: 0B23 0p07 ndi2 F880 IBM3209K4060 0J10 20N07 0H02 0J14
Contextual Info: â IBM Packet Routing Switch PRS28.4G Version 1.7 Datasheet â Copyright and Disclaimer  Copyright International Business Machines Corporation 1999, 2000. All Rights Reserved Printed in the United States of America August 2000 The following are trademarks of International Business Machines Corporation in the United States, or other countries, or both.

T2D48

Abstract: FPM DRAM 30-pin SIMM 0/MT2D48
Contextual Info: ADVANCE MT2D48 4 MEG X 8 DRAM MODULE ¡V U C F O N DRAM MODULE IV IU U U L t. 4 MEG x 8 4 MEG ABYTE -5VFAST PAGE MODE FEATURES PIN ASSIGNMENT Front View • JEDEC- and industry-standard pinout in a 30-pin, single-in-line m emory module (SIMM) • High-perform ance CM O S silicon-gate process

0M-02

Contextual Info: p x p o p O . o @ ©> / JO / ¿vi//^ s '/7 s r a j j . v m s- N / VMS >YOVS ONiaVd _ 3HVN ONiMvaa31VDSíonoa 200 + N iH U M 03 •NOHV 3 8 i S i i n 3N I1ä3i.N 3d 3WVS NO S310H '« . NO Û3SH is a id !JLÍV¡»H31IM5 O N33dSxvnU3d es-8j-¿. 1VW

0y10

Abstract: 0K-10 0y22 0Y06 0n25 137 0H14
Contextual Info: â IBM Dual Bridge and Memory Controller Databook â Copyright and Disclaimer  Copyright International Business Machines Corporation 1999. All Rights Reserved Printed in the United States of America September 1999 The following are trademarks of International Business Machines Corporation in the United States, or other countries, or both.

CRM 1191A

Abstract: of RAS 0510 relay ras 0610 relay PIN CONFIGURATION relay RAS 0510 RISCwatch
Contextual Info:  ATM Resource Manager Revision 2.1 Databook   International Business Machines Corp.1992-1998 Copyright and Disclaimer Printed in the United States of America All rights reserved IBM and the IBM logo are registered trademarks of the IBM Corporation.

IBM ASIC

Abstract: X2701 RISCwatch
Contextual Info:  IBM PowerNP NPr2.7 Datasheet Preliminary May 21, 2001  0.1 Copyright and Disclaimer  Copyright International Business Machines Corporation 1999, 2000, 2001 All Rights Reserved Printed in the United States of America May 2001 The following are trademarks of International Business Machines Corporation in the United States, or other countries,

IBM host bridge CPC710

Abstract: 137 0H14 0w08 0Y06 CPC710 timing CPC710
Contextual Info:  IBM Dual Bridge and Memory Controller CPC710-100 Databook Version 1.0 December 17, 1999  Copyright and Disclaimer  Copyright International Business Machines Corporation 1999. All Rights Reserved Printed in the United States of America November 1999

1C65H

Abstract: 1a5ah
Contextual Info: :5 6: 55 AM SPECTRA 4x155 ASSP Telecom Standard Product Data Sheet Released m be r, 20 05 12 PM5316 es da y, 13 De ce SPECTRA 4x155 Data Sheet Released Issue No. 6: November 2005 Do wn lo ad ed by Co nt e nt Te a m of P ar tm in er In co n Tu SONET/SDH Payload Extractor/Aligner

IBM processor

Abstract: 65Z5 IBM2520L8767 93-620R2 CRM 1191A 93-727 BC 247 RISCwatch BIOS chip 0d19
Contextual Info: â IBM Processor for ATM Resources Revision 2.1 Databook â Copyright and Disclaimer  Copyright International Business Machines Corporation 1999 All Rights Reserved Printed in the United States of America August 1999 The following are trademarks of International Business Machines Corporation in the United States, or other countries,