16 BIT FLOATING POINT Search Results

basic microprocessor block diagram

Abstract: F9443 F9450 microcode ScansUX1004
Contextual Info: A Schlumberger Company F9443 Floating-Point Processor Advance Product Information Microprocessor Product Description • FAIRCHILD The F9443 Floating-Point Processor is designed to provide enhancement to the numeric capabilities of 16-bit microprocessors by providing a set of floating­

MN5420

Abstract: hanning
Contextual Info: MN5420 Æ K ÏÏ Micro Networks A DIVISION OF U N I T M O I 20-Bit DYNAMIC RANGE FLOATING-POINT A/D CONVERTER CORPORATION DESCRIPTION • 320kHz Conversion Rate • Floating-Point 16-Bit Output: 12-Bit Mantissa 4-Bit Exponent • 120dB Dynamic Range: 10V Input Range

SPRS294

Contextual Info: TMS320C6713B FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR SPRS294 − SEPTEMBER 2005 D Highest-Performance Floating-Point Digital D D D D D D D 16-Bit Host-Port Interface HPI D Two McASPs Signal Processor (DSP): TMS320C6713B − Eight 32-Bit Instructions/Cycle

P1750A

Abstract: P1750A-15CMB 5962-8766503YX pace1750a P1750A-15GMB MIL-STD-1750 P1750A-20PGMB 5962-8766501TX P1750A-30QGMB IB14
Contextual Info: PACE1750A SINGLE CHIP, 15MHz to 40MHz, CMOS 16-BIT PROCESSOR FEATURES Implements the MIL-STD-1750A Instruction Set Architecture Single Chip PACE TechnologyTM CMOS 16-Bit Processor with 32 and 48-Bit Floating Point Arithmetic DAIS Instruction Mix Execution Performance

Contextual Info: PACE1750A SINGLE CHIP, 15MHz to 40MHz, CMOS 16-BIT PROCESSOR FEATURES Implements the MIL-STD-1750A Instruction Set Architecture Single Chip PACE TechnologyTM CMOS 16-Bit Processor with 32 and 48-Bit Floating Point Arithmetic DAIS Instruction Mix Execution Performance

16217

Abstract: Crystal Crystals c3-85 CS5321 CS5322 AN53 block diagram of floating point dsp processors 2620D
Contextual Info: AN53 The CS5322 Digital Filter by Jerome Johnston are lower cost but floating-point processors have more horsepower. Fixed point processors work with either 16, 20, or 24-bit data words, while floating-point processors operate with 32-bit data words. The size of the data word greatly

as3 SMD Transistor

Abstract: IB435 AK010 mil-std-1750 PACE1750A PACE1750AE P1750A mil-std-1750a smd ak3
Contextual Info: PACE1750AE SINGLE CHIP, 20MHz to 40MHz, ENHANCED CMOS 16-BIT PROCESSOR FEATURES Implements the MIL-STD-1750A Instruction Set Architecture Single Chip PACE TechnologyTM CMOS 16-Bit Processor with 32 and 48-Bit Floating Point Arithmetic Form-Fit-Functionally Compatible with the

Contextual Info: PACE1750AE SINGLE CHIP, 20MHz to 40MHz, ENHANCED CMOS 16-BIT PROCESSOR FEATURES Implements the MIL-STD-1750A Instruction Set Architecture Single Chip PACE TechnologyTM CMOS 16-Bit Processor with 32 and 48-Bit Floating Point Arithmetic Form-Fit-Functionally Compatible with the

verilog code for 32 BIT ALU implementation

Abstract: vhdl code for FFT 32 point radix-2 fft xilinx verilog code for FFT 32 point vhdl code for FFT 256 point 5275 fft algorithm verilog tigersharc verilog code for 64BIT ALU implementation ADSP-TS101S
Contextual Info: ADI-5275 TigerSHARC PH 3/7/03 10:15 AM Page 1 General-Purpose TigerSHARC Processor Highest Performance Floating-Point Processor Key Features Static Superscalar Architecture Optimized for High Throughput Floating-Point Applications • Eight 16-bit MACs/cycle with

1750A processor architecture

Abstract: PACE1750A KTC AS1-708N
Contextual Info: PACE1750AE SINGLE CHIP, 40MHz, ENHANCED CMOS 16-BIT PROCESSOR 4 - — FEATURES — - — • Implements the MIL-STD-1750A Instruction Set Architecture ■ Single Chip PACE Technology CMOS 16-BH Processor with 32 and 48-Bit Floating Point

FPP04

Abstract: bt 338 SLAUE11 Trigonometric C216 Heat Volume Counter MSP430 DBL100 CNV04
Contextual Info: The Floating-Point Package CNV_BIN16U Range: The 16-bit number, RPARG points to, is treated as a 16-bit unsigned number see Figure 5–22 . 0 to + 65535 (00000h to 0FFFFh) 15 Address n RPARG Figure 5–22. Unsigned Binary Input Buffer Format 16 Bits CNV_BIN32 The 32-bit number, RPARG points to, is treated as a 32-bit

am9511A

Abstract: AM9511 FLOATING POINT Co Processor 9511A
Contextual Info: Am9511A Arithmetic Processor Am9511A MILITARY INFORMATION DISTINCTIVE CHARACTERISTICS 2 and 3 MHz operation; fixed point 16-bit and 32-bit operations Floating point 32-bit operations; binary data formats Add, Subtract, Multiply and Divide; trigonometric and

parallel Multiplier Accumulator based on Radix-2

Abstract: DS3707 PDSP16116 PDSP16116A PDSP16318A subtractor using TTL CMOS GG144 4 bit binary full adder and subtractor 32-bit adder block diagram for barrel shifter
Contextual Info: PDSP16116 16 X 16 Bit Complex Multiplier Supersedes October 1996 version, DS3707 - 4.2 The PDSP16116 contains four 16316 array multipliers, two 32-bit adder/subtractors and all the control logic required to support Block Floating Point Arithmetic as used in FFT applications.

P1750A performance

Abstract: 5962-8766501TX P1750A20PGM P1750A-20PGMB
Contextual Info: PACE1750A SINGLE CHIP, 40MHz, CMOS 16-BIT PROCESSOR - • : — ; : FEATURES ■ Implements the MIL-STD-1750A Instruction Set Architecture ■ 20,30 and 40 MHz operation over the Military Temperature Range ■ Single Chip PACE Technology CMOS 16-Bit Processor with 32 and 48-Bit Floating Point

YR13

Abstract: PDSP16116
Contextual Info: PDSP16116 16 X 16 Bit Complex Multiplier DS3707 The PDSP16116 contains four 16316 array multipliers, two 32-bit adder/subtractors and all the control logic required to support Block Floating Point Arithmetic as used in FFT applications. The PDSP16116A variant will multiply two complex 16116

FULL SUBTRACTOR using 41 MUX

Abstract: PDSP16318A MIL-883 PDSP16116 PDSP16116A 32 bit barrel shifter circuit diagram using mux DIODE bfp 86 GC144 YR13
Contextual Info: PDSP16116 16 X 16 Bit Complex Multiplier DS3707 The PDSP16116 contains four 16316 array multipliers, two 32-bit adder/subtractors and all the control logic required to support Block Floating Point Arithmetic as used in FFT applications. The PDSP16116A variant will multiply two complex 16116

verilog code for 64BIT ALU implementation

Abstract: 8 BIT ALU design with vhdl code ADSP-TS201S ADSP-TS203S verilog code for 32 BIT ALU implementation vhdl code for radix 2-2 parallel FFT 16 point vhdl code for simple radix-2 vhdl code for 16 point radix 2 FFT ADDS-TS201S-EZLITE ADSP-TS202S
Contextual Info: 600 MHz TigerSHARC Processor: The Performance Density Leader Key Features Static Superscalar Architecture Optimized for High Throughput, FixedPoint, and Floating-Point Applications  • Eight 16-bit MACs/cycle with 40-bit accumulation • Two 32-bit MACs/cycle with 80-bit

amplifier CV 203

Abstract: 78x05 ymf271 YAC513M YAC513 CV 203 JRC OPamp YMF278 YAC513-M ymf*271
Contextual Info: YAMAHAL S i Y A C 5 13 2-Channel Floating D /A Converter •OUTLINE YAC513 is floating D/A converter with a 10-bit mantissa block and a 7-step exponent block, which generates analog output of 16-bit dynamic range. It is suitable for the stereo FM sound source

intel 8231A

Contextual Info: 8231A ARITHMETIC PROCESSING UNIT Fixed Point Single and Double Precision 16/32 Bit Floating Point Single Precision (32 Bit) Binary Data Formats Add, Subtract, Multiply and Divide Trignometric and Inverse Trigonometric Functions Square Roots, Logarithms,

L301-29

Contextual Info: LSH32 32-bit Cascadable Barrel Shifter FEATURES □ 32-bit Input, 32-bit Output Multiplexed to 16 Lines □ Full 0-31 Position Barrel Shift Capability □ Integral Priority Encoder for 32-bit Floating Point Normalization □ Sign-Magnitude or Two's Comple­

W6252

Contextual Info: LSH33 32-bit Barrel Shifter with Registers : □ 32-bit Input, 32-bit Output Multi­ plexed to 16 Lines □ Full 0-31 Position Barrel Shift Capability □ Integral Priority Encoder for 32-bit Floating Point Normalization □ Sign-Magnitude or Two's Comple­

Contextual Info: LSH32 32-bit Cascadable Barrel Shifter Features Description □ 32-bit input, 32-bit output multi­ plexed to 16 lines The LSH32 is a 32-bit high speed shifter designed for use in floating point normalization, word p ack / unpack, field extraction, and similar

l0617

Abstract: LSH32 LSH32GC42 LSH32JC32 LSH32JC42 pin diagram priority encoder 32 to 5
Contextual Info: LSH32 32-bit Cascadable Barrel Shifter Features Description □ 32-bit input, 32-bit output multi­ plexed to 16 lines The LSH32 is a 32-bit high speed shifter designed for use in floating point normalization, word p ack / unpack, field extraction, and similar

Contextual Info: PACE1750AE SINGLE CHIP, 40MHz, ENHANCED CMOS 16-BIT PROCESSOR FEATURES • Im plem ents th e M IL-STD-1750A Instruction Set Architecture ■ Single Chip PACE Technology CM OS 16-Bit Processor with 32 and 48-Bit Floating Point Arithm etic ■ Form-Fit-Functionally Com patible with the P1750A