P1750AE Search Results

pace1750

Abstract: 1750a PACE1750AE
Contextual Info: P1750AE/SOS SINGLE CHIP, 30MHz, ENHANCED SPACE PROCESSOR FEATURES Implements the MIL-STD-1750A Instruction Set Architecture Single Chip MIL-STD-1750AE Processor Form-Fit-Functionally Compatible with the P1750A CMOS Processor DAIS Instruction Mix Execution Performance

dsp radiation tolerance

Contextual Info: P1750AE/SOS SINGLE CHIP, 30MHz, ENHANCED SPACE PROCESSOR FEATURES Implements the MIL-STD-1750A Instruction Set Architecture Single Chip MIL-STD-1750AE Processor Form-Fit-Functionally Compatible with the P1750A CMOS Processor DAIS Instruction Mix Execution Performance

P1757

Abstract: pace1750 9F51 1F42 PACE P1757M PACE1757ME P1750A 4f05 mil-std-1750a
Contextual Info: PACE1757M/ME COMPLETE EMBEDDED CPU SUBSYSTEM FEATURES Implements complete MIL-STD-1750A ISA including optional MMU, MFSR, and BPU functions. Two throughput options: P1757M 2.5MIPS USAF Dais Mix Inc.Flt.Pt. @40 MHz P1757ME 3.6MIPS USAF Dais Mix (Inc.Flt.Pt.)@40 MHz

diode sk 4f1/ 02

Abstract: diode sk 4f1 pace1750 pace1750a F9450 diode sk 4f1/ 10 PACE1750AE P1750A MJ015 mil-std-1750a
Contextual Info: PACE1750AE SINGLE CHIP, 40MHz, ENHANCED CMOS 16-BIT PROCESSOR IP 1 F 8 E L M D IN M Y FEATURES — Parametric Memory Inner-Dot Products for Matrix Computations Up To 64K. — Fast Polynomial expansion algorithm. — Fast context switching with instruction to block

IN4118

Abstract: 1750AE pace1750 PACE1750A PACE1750AE MILSTD-1750A ANP-16 MN1631
Contextual Info: APPLICATION NOTE PACE1750AE BUILT-IN FUNCTIONS About This Note This application brief is intended to explain and demonstrate the use of the special functions that are built into the PACE1750AE processor. These powerful Built-In Functions BIFs are above and beyond the capabilities of the MILSTD-1750A instruction set, but are allowed by MIL-STD-1750A as options to enhance the performance of 1750A

Contextual Info: PACE 1757M/ME p r e l im in a r y COMPLETE EMBEDDED CPU SUBSYSTEM -FFATURES Implements complete MIL-STD-1750A ISA Including optional MMU, MFSR, and BPU functions. • Programmable address wait states.

MIL-STD-1750

Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Added device type 04. Technical changes were implemented. Editorial changes throughout. 92-05-06 Monica L. Poelking B Added device types 05, 06, and 07. Technical changes to table I. Editorial changes throughout.

Contextual Info: PACE1757M/ME COMPLETE EMBEDDED CPU SUBSYSTEM FEATURES Implements complete MIL-STD-1750A ISA including optional MMU, MFSR, and BPU functions. Two throughput options: P1757M 2.5MIPS USAF Dais Mix Inc.Flt.Pt. @40 MHz P1757ME 3.6MIPS USAF Dais Mix (Inc.Flt.Pt.)@40 MHz

Contextual Info: PACE1750AE SINGLE CHIP, 40MHz, ENHANCED CMOS 16-BIT PROCESSOR FEATURES — Parametric Memory Inner-Dot Products for Matrix Computations Up To 64K. — Fast Polynomial expansion algorithm. — Fast context switching with instruction to block move up to 16 new mapping memory page

HIT 7070

Abstract: k1757
Contextual Info: PERFORMANCE SEMI CONDUCTOR SOE D • 70bBST7 000175b 32T ip PACE 1757M/ME PREÜMl COMPLETE EMBEDDED CPU SUBSYSTEM FEATURES Programmable address wait states. Implements complete MIL-STD-1750A ISA Including optional MMU, MFSR, and BPU functions. Sixteen levels of interrupts are provided per MIL-STD1750A. Interrupts can be either edge- or level-sensitive.

1750A processor architecture

Abstract: PACE1750A KTC AS1-708N
Contextual Info: PACE1750AE SINGLE CHIP, 40MHz, ENHANCED CMOS 16-BIT PROCESSOR 4 - — FEATURES — - — • Implements the MIL-STD-1750A Instruction Set Architecture ■ Single Chip PACE Technology CMOS 16-BH Processor with 32 and 48-Bit Floating Point

DME 40

Abstract: 1F42 8410 psc ft6t 102 scr FIR 3d pace1750 mil-std-1750a pin out of scr BT 106 pic 636 WAOI
Contextual Info: PERFORMANCE SEMICONDUCTOR SDE D • TDbEST? 000172b 32T H P S C PACE 1757M/ME p r e l im in a r y COMPLETE EMBEDDED CPU SUBSYSTEM FEATURES Programmable address wait states. Implements complete M1L-STD-1750A ISA Including optional MMU, MFSR, and BPU functions.

ISO 2768 fH

Abstract: st smd diode marking code G11 marking code 1BL Diode DX-66 MIL-STD-1750* BX 1BL o.h Diode MIL-STD-1750 P1750A performance bz 148 diode JJ SMD diode a8
Contextual Info: REVISIONS LTR DATE Y8-H0-DA DESCRIPTION APPROVED Added device type 04. Technical changes were implemented. Editorial changes throughout. 92-05-06 Monica L. Poelking Added device types 05, 06, and 07. Technical changes to table I. Editorial changes throughout.

Contextual Info: PACE1750AE SINGLE CHIP, 40MHz, ENHANCED CMOS 16-BIT PROCESSOR FEATURES • Im plem ents th e M IL-STD-1750A Instruction Set Architecture ■ Single Chip PACE Technology CM OS 16-Bit Processor with 32 and 48-Bit Floating Point Arithm etic ■ Form-Fit-Functionally Com patible with the P1750A

5962L0053605VYC

Abstract: 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA
Contextual Info: NOT MEASUREMENT SENSITIVE MIL-HDBK-103AJ 19 SEPTEMBER 2011 SUPERSEDING MIL-HDBK-103AH 28 MARCH 2011 DEPARTMENT OF DEFENSE HANDBOOK LIST OF STANDARD MICROCIRCUIT DRAWINGS This handbook is for guidance only. Do not cite this document as a requirement. AMSC N/A