10EL15 Search Results

100EL15

Abstract: ee2525
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1:4 C lo c k D is trib u tio n C hip M C 10EL15 M C 100EL15 The M C 10E U 100E L15 is a low skew 1:4 clock distribution chip designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if

E142 wafer format

Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
Contextual Info: DL140/D Rev. 6, Jan-2001 High Performance ECL Data ECLinPS and ECLinPS Lite™ High Performance ECL Device Data ECLinPS, ECLinPS Lite, and Low Voltage ECLinPS DL140/D Rev. 6, Jan–2001  SCILLC, 2001 Previous Edition  2000 “All Rights Reserved”

100EL15

Abstract: transistor el15 MC100EL15 MC10EL15 el15 transistor
Contextual Info: 10EL15, MC100EL15 5V ECL 1:4 Clock Distribution Chip The MC10EL/100EL15 is a low skew 1:4 clock distribution chip designed explicitly for low skew clock distribution applications. The VBB pin, an internally generated voltage supply, is available to this device

transistor el15

Abstract: el15 transistor
Contextual Info: 10EL15, MC100EL15 5V ECL 1:4 Clock Distribution Chip The MC10EL/100EL15 is a low skew 1:4 clock distribution chip designed explicitly for low skew clock distribution applications. The VBB pin, an internally generated voltage supply, is available to this device

KLT20

Abstract: k1648 klt22 KEL32 MC100 HEP64 KLT21 LP17 KEP32 HEP139
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite, ECLinPS Plus, ECLinPS MAX, and GigaComm Marking and Ordering Information Guide http://onsemi.com APPLICATION NOTE Prepared by: Paul Shockman ON Semiconductor HFPD Applications Engineer Introduction This application note describes the device markings and

kvt22

Abstract: KVL11 KPT23 ON Semiconductor marking k1648 KLT20 HEL16 KEL32 KEL01 xaa9646
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite and ECLinPS Plus Device Type and Date Code Marking Guide Gary Richards, ECL Logic Product Engineering http://onsemi.com APPLICATION NOTE need ON Semiconductor’s marking spec 12MON00232D and S.O.P. 7–19 ID of Products to Location of

Contextual Info: Precision Edge 10EL15 SY100EL15 FINAL 1:4 CLOCK DISTRIBUTION FEATURES • ■ ■ ■ ■ 50ps output-to-output skew Synchronous enable/disable Multiplexed clock input 75KΩ internal input pull-down resistors Available in 16-pin SOIC package Precision Edge™

100EL15

Abstract: 10EL15 MC100EL15 MC10EL15 MC10EL15D MC10EL15DR2 transistor el15 el15 transistor
Contextual Info: 10EL15, MC100EL15 5V ECL 1:4 Clock Distribution Chip The MC10EL/100EL15 is a low skew 1:4 clock distribution chip designed explicitly for low skew clock distribution applications. The VBB pin, an internally generated voltage supply, is available to this device

Contextual Info: 10EL15, MC100EL15 5V ECL 1:4 Clock Distribution Chip The MC10EL/100EL15 is a low skew 1:4 clock distribution chip designed explicitly for low skew clock distribution applications. The VBB pin, an internally generated voltage supply, is available to this device

SY10EL15

Abstract: 1035 transistor 10el15 led clock circuit diagram PS 1025 ts 1620 100EL15 SY100EL15
Contextual Info: ClockWorks 1:4 CLOCK DISTRIBUTION SYNERGY SEMICONDUCTOR FEATURES • ■ ■ ■ ■ ■ DESCRIPTION The SY10/100EL15 are low skew 1:4 clock distribution chips designed explicitly for low skew clock distribution applications. The device can be driven by either a

SY100EL15ZG

Abstract: SY10EL15 SY100EL15 SY100EL15ZC SY100EL15ZCTR SY10EL15ZC SY10EL15ZCTR SY10EL15ZI
Contextual Info: Micrel, Inc. 1:4 CLOCK DISTRIBUTION Precision Edge 10EL15 Precision SY100EL15 Edge® 10EL15 SY100EL15 FEATURES • ■ ■ ■ ■ 50ps output-to-output skew Synchronous enable/disable Multiplexed clock input 75KΩ internal input pull-down resistors

MC10EL15

Abstract: 100EL15 10EL15 MC100EL15 MC100EL15D MC100EL15DR2 MC10EL15D MC10EL15DR2 el15 transistor
Contextual Info: 10EL15, MC100EL15 5VĄECL 1:4 Clock Distribution Chip The MC10EL/100EL15 is a low skew 1:4 clock distribution chip designed explicitly for low skew clock distribution applications. The VBB pin, an internally generated voltage supply, is available to this device

100EL15

Contextual Info: * Clockworks 10EL15 SY100EL15 1:4 CLOCK DISTRIBUTION SYNERGY S E M IC O N D U C T O R FEATURES DESCRIPTION • 50ps output-to-output skew ■ Synchronous enable/disable ■ Multiplexed clock input ■ 75K Q internal input pull-down resistors ■ ESD protection of 2000V

Contextual Info: ' ' lo c k W o rk s 1M i 4 CLOCK 3 V 10 E L 1 S DISTR IBUTION • VU IO El. 1 5 FEATURES • 5 0 p s o u tp u t-to -o u tp u t sk ew ■ S y n c h ro n o u s e n a b le /d is a b le ■ M u ltip le x e d c lo c k in p u t ■ 75 K D in tern al in p u t p u ll-d o w n res is to rs

HEL16

Abstract: DEVICE MARKING CODE table onsemi marking marking code onsemi marking code onsemi Diode kel33 on semiconductor traceability marking soic HEL32 HEL12 HEL31 HEL05
Contextual Info: AND8002/D ECLinPS, ECLinPS Lite, ECLinPS Plus, ECLinPS MAX, and GigaComm Marking and Ordering Information Guide http://onsemi.com APPLICATION NOTE Prepared by: Paul Shockman ON Semiconductor HFPD Applications Engineer Introduction This application note describes the device markings and

Contextual Info: ClockWorks 10EL15 SY100EL15 1:4 CLOCK DISTRIBUTION FEATURES • ■ ■ ■ ■ DESCRIPTION The SY10/100EL15 are low skew 1:4 clock distribution chips designed explicitly for low skew clock distribution applications. The device can be driven by either a

Contextual Info: * 1 "4 C L O C K SYNERGY D ISTR IB U TIO N SEMICONDUCTOR FEATURES • Synchronous enable/disable ■ Multiplexed clock input ■ 75KD internal input pull-down resistors ■ ESD protection of 2000V ■ Available in 16-pin SOIC package PIN CONFIGURATION/BLOCK DIAGRAM