1024X36 Search Results

Contextual Info: ggSi'x jjûfey CMOS SyncBiFIFO 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 IDT723622 ¡DT723642 Integrated Device Technology, Inc. Advance inform ation for the IDT723622 Final for the IDT723632 Advance inform ation for the IDT723642 FEATURES: • Free-running CLKA and CLKB m ay be asynchronous or

Contextual Info: In te g ra te d D e v i e T e d h n o Jo g y , lie . CMOS Triple Bus SyncFlFO1 With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: There are two errata notices at the end of this data sheet. The May 20 errata describes corrections that have

Contextual Info: |dy Integrated Dev ice Technology, Inc. CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY I D T y iii ll IDT723646 FEATURES: • Memory storage capacity: IDT723626-256 x 36 x 2 IDT723636-512 x 3 6 x 2 IDT723646-10 2 4 x 3 6 x 2

Contextual Info: Integrated Device TechnoJogy, lie. PRELIMINARY IDT723624 IDT723634 IDT723644 CMOS Sync BiFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 NOTE: There is an errata notice on the last page and the corrections have not been incorporated into this document.

ir911

Abstract: A14C A15C A25C A26C SN74ACT3631 SN74ACT3641 SN74ACT3651
Contextual Info: SN74ACT3641 1024x36 CLOCKED FIRST-IN, FIRST-OUT MEMORY S CAS338A - JANUARY 1994 - RE V IS E D JUNE 1994 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Memory Size: 1024 x 36 Synchronous Read Retransmit Capability

L2735

Abstract: D-34A i-box
Contextual Info: LH543611/21 512x36x2/1024x36x2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • The LH543611 and LH543621 contain two FIFO buff­ ers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering.

Contextual Info: L H 5 4 3 6 1 1 / 2 1 512x36x2/1024x36x2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • The LH543611 and LH543621 contain two FIFO buff­ ers, FIFO #1 and FIFO #2. These operate in parallel, but in opposite directions, for bidirectional data buffering.

Contextual Info: In teg rated D evice Technology, Inc. CMOS Sync BiFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 FEATURES: • Memory storage capacity: IDT723624-256 x 36 x 2 IDT723634-512 x 3 6 x 2 IDT723644-10 2 4 x 3 6 x 2 • Two independent clocked FIFOs buffering data in

Contextual Info: CMOS SyncFlFO 512x36, 1024x36, 2048 x 36 IDT723631 IDT723641 IDT723651 In teg rated D e v ic e T ec h n o lo g y , Inc. FEATURES: • Supports clock frequencies up to 67 MHz • Fast access times of 11 ns • Available in 132-pin plastic quad flat package PQF or

Contextual Info: CMOS SyncBiFlFO 256x36x2, 512x36x2, 1024x36x2 IDT723622 IDT723632 IDT723642 Integrated D evice Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident simultaneous reading and writing of data on a single clock edge is permitted

G1032L

Abstract: 2S81 B35t A25C A34C IC51-1324-828 SN74ACT3631 SN74ACT3641 SN74ACT3651
Contextual Info: SN74ACT3641 1024x36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS338B - JANUARY 1994 - REVISED SEPTEMBER 1995 • Free-Running CLKA and CLKB Can Be Asynchronous or Coincident • Clocked FIFO Buffering Data From Port A to Port B • Memory Size: 1024 x 36 • Synchronous Read-Retransmit Capability

Contextual Info: SN74ACT3641 1024x36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS338C - JANUARY 1994 - REVISED OCTOBER 1997 * Free-Running CLKAand CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B I • • Memory Size: 1024 x 36 • • Synchronous Read-Retransmit Capability

Contextual Info: |dy In teg rated Dev ice Technology, Inc. CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY I D T y iii ll IDT723646 FEATURES: • Memory storage capacity: IDT723626-256 x 36 x 2 IDT723636-512 x 3 6 x 2 IDT723646-10 2 4 x 3 6 x 2

Contextual Info: In tegrated D e vice T e ch n o lo g y , Inc. CMOS Triple Bus SyncFIFOT With Bus-Matching 256x36x2, 512x36x2, 1024x36x2 PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: The errata notice on the last page describes corrections that have already been added to this document.

Contextual Info: IDT723622 IDT723632 IDT723642 CMOS SyncBiFIFO 256x36x2, 512x36x2, 1024x36x2 Integrated Device Technology, Inc. Advance inform ation for the IDT723622 Final for the IDT723632 Advance inform ation f o r the IDT723642 • • • • • • • Program mable Alm ost-Full and Alm ost-Em pty flags

DNA 1001 DL

Abstract: DSB45 D-33A D35B 60 74
Contextual Info: LH543611/21 512x36x2/1024x36 x2 Synchronous Bidirectional FIFO FEATURES FUNCTIONAL DESCRIPTION • Pin-Compatible and Functionally Upwards-Compatible with Sharp LH5420 and LH543601, but Deeper • Expanded Control Register that is Fully Readable as well as Writable

Contextual Info: In teg rated D evice Technology, Inc. CMOS Sync BiFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 FEATURES: • Memory storage capacity: IDT723624-256 x 36 x 2 IDT723634-512x36x2 IDT723644-1024x36x2 • Two independent clocked FIFOs buffering data in

A20C

Abstract: A23C A25C A26C SN74ACT3622 SN74ACT3632 SN74ACT3642
Contextual Info: SN74ACT3642 1024x36x2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS440A - JUNE 1994 - REVISED SEPTEMBER 1995 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent Clocked FIFOs Buffering Data in Opposite Directions Mailbox-Bypass Register for Each FIFO

IZB27

Abstract: IZB30 A30C
Contextual Info: CMOS SyncFIFO IDT723631 IDT723641 IDT723651 51 2x3 6, 1024x36, 2048 X 36 Advance inform ation for the IDT723631 Final inform ation for the IDT723641 • Output-Ready OR and Alm ost-Em pty (AE) flags syn­ chronized by CLKB • Low-power 0.8-m icron advanced CM OS technology

ZL68

Contextual Info: DUAL 256/512/1024x36 CMOS SyncFlFO FEATURES: ADVANCED INFORMATION IDT723622 IDT723632 IDT723642 space-saving 120-pin Thin Quad Flatpack PF • Free-running CLKA and CLKB may be asynchronous or coincident • Two independent clocked FIFOs buffering data in oppo­

Contextual Info: CMOS SyncFIFO 512x36, 1024x36, 2048 x 36 IDT723631 IDT723641 IDT723651 Integrated Device Technology, Inc. Advance information for the IDT723631 Final information for the IDT723641 Advance information for the IDT723651 • Output-Ready OR and Alm ost-Em pty (AE) flags syn­

IDT723626

Abstract: IDT723636 IDT723646
Contextual Info: IDT723626/723636/723646 Bus Matching Triple Bus SyncFIFO 256 x 36 x 2, 512 x 36 x 2, 1024 x 36 x 2 CMOS Triple Bus SyncFIFO With Bus Matching 256 x 36 x 2, 512 x 36 x 2, 1024 x 36 x 2 Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE ADVANCE

IDT723626

Abstract: IDT723636 IDT723646 asynchronous dual port SRAM IDT
Contextual Info: IDT723626/723636/723646 Bus Matching Triple Bus SyncFIFO 256 x 36 x 2, 512 x 36 x 2, 1024 x 36 x 2 CMOS Triple Bus SyncFIFO™ With Bus Matching 256 x 36 x 2, 512 x 36 x 2, 1024 x 36 x 2 Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE ADVANCE

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455