100LT Search Results

UM61L3232AF-7

Abstract: UM61L3232A um61 UM61L UM61L3232 UM61L3232AF-8 UM61-l-3232af
Contextual Info: UM61L3232A Series PRELIMINARY 32K X 32 Bit Synchronous High Speed SRAM with Burst Counter and Pipelined Data Output Features Fast access times: 5/6/7/8 ns Single +3.3V+10% or +3.3V-5% power supply Synchronous burst function Individual Byte W rite control and Global Write

Contextual Info: J. TT en <n 5EC T - > . " A w - A CSCALE 10-13 — I w NOTES, \ 1 o n _ _ r 1 u [ 1 v \TL_ _ A CL 2 .5^ \- _ 2 .5 Ü 1 r « N LU i- M A T E R I A L ; H O U S I N G : L . C . PCHIGH TEMP T H ER M O PLASTIC UL 9 4 V - 0 , N A T U R A L .

BUK455-400B

Abstract: BUK455 BUK455-400A T0220AB
Contextual Info: Philips Components BUK455-400A BUK455-400B PowerMOS transistor GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a plastic envelope. The device is intended for use in Switched Mode Power Supplies SMPS , motor control, welding,

1B09 transistor

Abstract: 100-P BUK444-600B 1B09
Contextual Info: P H IL IP S IN T E R N A T IO N A L b 5 ED H 7 1 1 0 0 2 b O G b B 'ìT bT b O«PHIN Product Specification Philips Semiconductors BUK444-600B PowerMOS transistor GENERAL DESCRIPTION N-channel enhancement mode fieid-effect power transistor in a plastic full-pack envelope.

R2622

Contextual Info: PRODUCT NO POLARISED POS 94253-001 94253-006 PIN 20 PIN 20, 27 RECOMENDED PCB HOLE LAYOUT 0,00 -f’-f' o o o o o o O O O O ooooooooooo 0,107 0.000 O O 0,0 ooqo 1,65 0,065 4,19 0,165 1.02 »0.08 0^040 *0’003 DIA 45X ‘J JJ DIA(4X) 0,060 *0'003 8,51 1,02

CO6R

Abstract: isplsi2 00LQ
Contextual Info: Lattice ii*Coipo°atfont0r ispLSI• 2096E In-System Programmable SuperFAST High Density PLD &SEBSSB Features • SUPERFAST HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC — 4000 PLD Gates — 96 I/O Pins, Two Dedicated Inputs — 96 Registers — High Speed Global Interconnect

Contextual Info: Philips Semiconductors Product specification PowerMOS transistor BUK565-200A Logic level GENERAL DESCRIPTION QUICK REFERENCE DATA N-channei enhancement mode logic level fleld-effect power transistor in a

Contextual Info: LSC BSCAN-1: IEEE 1149.1 Multiple Scan Port Addressable Buffer Introduction Functional Overview The LSC BSCAN-1 is a multiple boundary scan test access port TAP addressable buffer function that can be accessed through a standard IEEE 1149.1 interface. With three Local Scan Ports (LSP), the BSCAN-1 function can be structured as hierarchical ports with the ability

CY7C1370DV25-167AXC

Abstract: CY7C1370DV25-167BZI MB1028
Contextual Info: CY7C1370DV25 CY7C1372DV25 18-Mbit 512 K x 36/1 M × 18 Pipelined SRAM with NoBL Architecture 18-Mbit (512 K × 36/1 M × 18) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™

UM61L3232

Abstract: UM61L UM61L3232f UM61 UM61L3232F-7
Contextual Info: isM s\ PRELIMINARY UM61L3232 Series 32K X 32 Bit Synchronous High Speed SRAM with Burst Counter and Pipelined Data Output Features Fast access times: 5/6/7/8 ns Single +3.3V+10% or +3.3V-5% power supply Synchronous burst function Individual Byte W rite control and Global Write

J-STD-020A

Abstract: Compound 60RH Ablestik 2000 J-STD-020-A
Contextual Info: Cypress Semiconductor Package Qualification Report QTP# 99346 VERSION 1.0 March, 2000 235° C Reflow Profile 100-pin TQFP ≤ ≤14 x 14 x 1 mm Anam, Korea CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Ed Russell Reliability Director (408) 432-7069 Cypress Semiconductor

17815t

Contextual Info: Regulator ICs Standard 78 series, 3-terminal regulator B A 17800T/FP series The B A 1 7 8 0 0 T and B A 1 7 8 0 0 F P Series are 3-term inal, fixed positive ou tput voltage regulators. These regulators are used to provide a stabilized output voltage from a fluctuating DC input voltage.

Contextual Info: DS90CR483A,DS90CR484A DS90CR483A/DS90CR484A 48-Bit LVDS Channel Link SER/DES 33-112 MHz Texa s In s t r u m e n t s Literature Number: SNLS291 N a t i o n a l DS90CR483A / DS90CR484A 48-Bit LVDS Channel Link SER/DES ± 3 3 - 1 1 2 MHz General Description The DS90CR483A transm itter converts 48 bits of CMOS/TTL

Contextual Info: PHILIPS INTERNATIONAL bSE » E9 711GÖEb 0Db431b Philips Semiconductors Product Specification PowerMOS transistor Fast recovery diode FET GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a plastic envelope. FREDFET with fast recovery

Contextual Info: Lattice* “ ; S e m ico nd u cto r • ■ ■ C orporation Features ispLSI 2064V High-Density Programmable Logic Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — — — — — 2000 PLD Gates 64 and 32 I/O Pin Versions, Four Dedicated Inputs

isplsi2064

Contextual Info: Lattice* “ ; S e m ico nd u cto r • ■ ■ C orporation Features ispLSI 2064V High-Density Programmable Logic Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — — — — — • • • • • 2000 PLD Gates 64 and 32 I/O Pin Versions, Four Dedicated Inputs

Contextual Info: Lattice* “ ; S e m ico nd u cto r • ■ ■ C orporation Features ispLSI 2064V High-Density Programmable Logic Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — — — — — 2000 PLD Gates 64 and 32 I/O Pin Versions, Four Dedicated Inputs

Contextual Info: Lattica ;Semiconductor I Corporation Features ispLSI 2064V High-Density Programmable Logic Functional Block Diagram HIGH-DENSITY PROGRAMMABLE LOGIC — — — — — 2000 PLD Gates 64 and 32 I/O Pin Versions, Four Dedicated Inputs 64 Registers High Speed Global Interconnect

TRANSISTOR FS 10 TM

Contextual Info: Philips Semiconductors Preliminary specification TrenchMOS transistor Logic level FET FEATURES PHP87N03LT, PHB87N03LT SYMBOL QUICK REFERENCE DATA VDSS = 25 V • ’Trench’ technology • Very low on-state resistance • Fast switching • Stable off-state characteristics

Contextual Info: MULTI-TURN PO TEN TIO M ETER S MODEL 533 Description Three Turn 7/8* Dia., 1/4* Shaft 537 552 Three Turn 7 /8 'Dia., 1/8 'Shaft Page 38 Three Turn 7/8" Dia., 1/4' Shaft Bushing Wirewound Page 38 50 f t to 20Kft 5 ftto 6 0 K ft so n to 20«n 5ft to 60Kft 5ft to 20Kft

2SK2690

Abstract: 2SK2690-01 SC-65 TI SVG
Contextual Info: SPECIFICATION DEVICE NAME : Power M O SFET TYPE NAME 2SK2690-01 : SPEC. NO. Fuji Electric Co.,Ltd. This Specification is subject to change without notice. DATE NAME APPROVED DRAWN CHECKED -¿a Fuji Electric Co.,Ltd. V, & 1.Scope This specifies Fuji Power MO S F ET 2 S K2690-01

BUK456-60H

Abstract: T0220AB transistor wm cms
Contextual Info: N AUER PHILIPS/DISCRETE b'JE D • bbS3T31 DD3Qb75 Philips Semiconductors Product Specification PowerMOS transistor GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a plastic envelope. The device is intended for use in Automotive and general purpose