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    M3X.5X42MM PHIL FILLISTER M111
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    050G04 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    HEF4541B

    Abstract: HEF4541BP 10Vd-D HEF4541BT hef4541 400VDD
    Contextual Info: HEF4541B Programmable timer Rev. 4 — 25 June 2012 Product data sheet 1. General description The HEF4541B is a programmable timer which consists of a 16-stage binary counter, an integrated oscillator to be used with external timing components, an automatic power-on


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    hef4541b16-stagehef4541bp10vd-d+3hef4541bthef4541400vdd PDF

    74hc733

    Abstract: 74HC73 74HC73N 74HC73D 74HC73DB 74HC73PW JESD22-A114E SSOP14 SSOP14 package
    Contextual Info: 74HC73 Dual JK flip-flop with reset; negative-edge trigger Rev. 04 — 19 March 2008 Product data sheet 1. General description The 74HC73 is a high-speed Si-gate CMOS device that complies with JEDEC standard no. 7A. It is pin compatible with Low-power Schottky TTL LSTTL .


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    74hc7374hc73374hc73n74hc73d+574hc73db74hc73pwjesd22-a114essop14ssop14 package PDF

    21A1

    Abstract: 74LV125DB 74HC125 74HCT125 74LV125 74LV125D 74LV125N 74LV125PW JESD22-A114E
    Contextual Info: 74LV125 Quad buffer/line driver; 3-state Rev. 03 — 7 April 2009 Product data sheet 1. General description The 74LV125 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC125 and 74HCT125. The 74LV125 provides four non-inverting buffer/line drivers with 3-state outputs. The


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    74lv12574hc12574hct12521a1+574lv125db74lv125d74lv125n74lv125pwjesd22-a114e PDF

    HEF4001BP

    Abstract: datasheet of HEF4001BP HEF4001* OR HEF4001BT HEF4001B JESD22-A114E MO-001
    Contextual Info: HEF4001B Quad 2-input NOR gate Rev. 05 — 27 March 2008 Product data sheet 1. General description The HEF4001B is a quad 2-input NOR gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS


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    hef4001bhef4001bpdatasheet of hef4001bphef4001* or+3hef4001btjesd22-a114emo-001 PDF

    74HC27

    Abstract: dhvqfn14 74HC27N 74HC27BQ 74HC27D 74HC27DB 74HC27PW 74HCT27 JESD22-A114E HCT273
    Contextual Info: 74HC27; 74HCT27 Triple 3-input NOR gate Rev. 03 — 7 January 2008 Product data sheet 1. General description The 74HC27; 74HCT27 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL LSTTL . The 74HC27; 74HCT27 provides the 3-input NOR function.


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    74hc2774hct27jesd22-a114ejesd22-a115-a+874hc27ndip14dhvqfn1474hc27bq74hc27d74hc27db74hc27pwhct273 PDF

    dhvqfn14

    Abstract: 74HC32 74HCT32 74LV32 74LV32D 74LV32DB 74LV32N 74LV32PW JESD22-A114E
    Contextual Info: 74LV32 Quad 2-input OR gate Rev. 03 — 9 November 2007 Product data sheet 1. General description The 74LV32 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC32 and 74HCT32. The 74LV32 provides a quad 2-input OR function. 2. Features


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    74lv3274hc3274hct32jesd22-a114e+6jesd22-a115-adhvqfn1474lv32d74lv32db74lv32n74lv32pw PDF

    HEF4081BP

    Abstract: HEF4081BT HEF4081B MO-001
    Contextual Info: HEF4081B Quad 2-input AND gate Rev. 05 — 29 June 2009 Product data sheet 1. General description The HEF4081B is a quad 2-input AND gate. The outputs are fully buffered for highest noise immunity and pattern insensitivity to output impedance variations. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS


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    hef4081bhef4081bphef4081btmo-001 PDF

    HEF4071B

    Abstract: HEF4071BP HEF4071BT MO-001
    Contextual Info: HEF4071B Quad 2-input OR gate Rev. 05 — 28 July 2009 Product data sheet 1. General description The HEF4071B is a quad 2-input OR gate. The outputs are fully buffered for highest noise immunity and pattern insensitivity to output impedance variations. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS


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    hef4071bhef4071bphef4071btmo-001 PDF

    74HC164N PIN DIAGRAM

    Abstract: 74hc164n 74HCT164 application note 74HC164 74HCT164 74HCT164BQ 74HC164D 74HC164DB 74HCT164D 74HCT164DB
    Contextual Info: 74HC164; 74HCT164 8-bit serial-in, parallel-out shift register Rev. 5 — 25 November 2010 Product data sheet 1. General description The 74HC164; 74HCT164 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL LSTTL . They are specified in compliance with JEDEC


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    74hc16474hct164hct16474hc164n pin diagram+774hc164n74hct164 application note74hct164bq74hc164d74hc164db74hct164d74hct164db PDF

    HEF40106BP

    Abstract: HEF40106B HEF40106BT HEF40106 MO-001
    Contextual Info: HEF40106B Hex inverting Schmitt trigger Rev. 4 — 15 November 2010 Product data sheet 1. General description The HEF40106B provides six inverting buffers. Each input has a Schmitt trigger circuit. The inverting buffer switches at different points for positive-going and negative-going


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    hef40106bhef40106bphef40106bthef40106+1mo-001 PDF

    74HCU04

    Abstract: 74HCu04 oscillator application note dhvqfn14 NXP 74HCU04D 74HCU04D 74HCU04DB 74HCU04N 74HCU04PW
    Contextual Info: 74HCU04 Hex inverter Rev. 3 — 16 September 2010 Product data sheet 1. General description The 74HCU04 is high-speed Si-gate CMOS devices and is pin compatible with low power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard No. 7A.


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    74hcu04jesd22-a114fjesd22-a115-aot27-1+874hcu04ndip1474hcu04 oscillator application notedhvqfn14nxp 74hcu04d74hcu04d74hcu04db74hcu04pw PDF

    Contextual Info: HEF4070B-Q100 Quad 2-input EXCLUSIVE-OR gate Rev. 1 — 22 May 2014 Product data sheet 1. General description The HEF4070B-Q100 is a quad 2-input EXCLUSIVE-OR gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance.


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    hef4070b-q100aec-q100 PDF

    74HC4024

    Abstract: 4000B 74HC4024D 74HC4024DB 74HC4024N 74HC4024PW
    Contextual Info: 74HC4024 7-stage binary ripple counter Rev. 4 — 29 September 2010 Product data sheet 1. General description The 74HC4024 is a high-speed Si-gate CMOS device and is pin compatible with the 4024 of the 4000B series. The 74HC4024 is specified in compliance with JEDEC


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    74hc40244000b74hc4024d74hc4024db+274hc4024n74hc4024pw PDF

    Contextual Info: 74HC107; 74HCT107 Dual JK flip-flop with reset; negative-edge trigger Rev. 3 — 18 November 2013 Product data sheet 1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock CP and reset (R) inputs and complementary Q and Q


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    74hc10774hct107hct107 PDF

    HEF4001UBP

    Abstract: BAW62 HE4000B HEF4001UB HEF4001UBD HEF4001UBT MS-012AB HEF4001* OR
    Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4001UB gates Quadruple 2-input NOR gate


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    he4000bhef4001ubot27-1050g04+7mo-001aahef4001ubpbaw62hef4001ubdhef4001ubtms-012abhef4001* or PDF

    HEF4011UBT

    Abstract: MS-012AB BAW62 HE4000B HEF4011UB HEF4011UBD HEF4011UBP
    Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4011UB gates Quadruple 2-input NAND gate


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    he4000bhef4011ubot27-1050g04+6mo-001aahef4011ubtms-012abbaw62hef4011ubdhef4011ubp PDF

    HEF4082B

    Abstract: HE4000B HEF4082BD HEF4082BP HEF4082BT MS-012AB MAX655
    Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4082B gates Dual 4-input AND gate Product specification


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    he4000bhef4082bhef4082bp14-lead+5ot27-1hef4082bdhef4082btms-012abmax655 PDF

    74LV74

    Contextual Info: IN TEG R A TED CIR C U ITS Philips Semiconductors PHILIPS PHILIPS Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive edge-trigger 74LV74 FEATURES DESCRIPTION • Wide operating voltage: 1.0 to 5.5V The 74LV74 is a low-voltage Si-gate CMOS device and is pin and


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    74lv7474hc/hct74 PDF

    Contextual Info: IN TEG R A TED CIR C U ITS 74LV27 Triple 3-input NOR gate Product specification 1997 Feb 03 IC24 Data Handbook Philips Semiconductors PHILIPS PHILIPS Philips Semiconductors Product specification Triple 3-input NOR gate 74LV27 FEATURES DESCRIPTION • Wide operating voltage: 1.0 to 5.5 V


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    74lv2774hc/hct27 PDF

    74LV393PW

    Contextual Info: IN TEG R A TED CIR C U ITS Product specification 1997 Mar 04 IC24 Data Handbook Philips Semiconductors PHILIPS Philips Semiconductors Product specification Dual 4-bit binary ripple counter 74LV393 FEATURES DESCRIPTION • Wide operating voltage: 1.0 to 5.5V


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    74lv39374hc/hct39374lv393pw PDF

    74HC14 oscillator application note

    Abstract: 74HC14 74HC14 oscillator application diagram 74HC14 application note 74HC14 so14 74HC14 DIP14 74HCT14 74hc14 philips 74hc14n equivalent 74HCT14N PHILIPS
    Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74HC14; 74HCT14 Hex inverting Schmitt trigger Product specification Supersedes data of 1997 Aug 26 2003 Oct 30 Philips Semiconductors Product specification Hex inverting Schmitt trigger 74HC14; 74HCT14 FEATURES DESCRIPTION • Applications:


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    74hc1474hct14sca75613508/03/pp23+874hc14 oscillator application note74hc14 oscillator application diagram74hc14 application note74hc14 so1474hc14 dip1474hc14 philips74hc14n equivalent74hct14n philips PDF

    74F125

    Abstract: 74F126 N74F125D N74F125N N74F126D N74F126N
    Contextual Info: Philips Sem iconductors Product specification Quad buffers 3-State 74F125, 74F126 FEATURE ORDERING INFORMATION • High im pedance NPN base inputs for reduced loading TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F125 5.0ns 23m A 74F126


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    74f12574f12614-pinn74f125n+3n74f126nn74f125dn74f126d PDF

    HEF4024BP

    Abstract: HEF4024BT MO-001 HEF4024B QRD11 HEF4024BCN
    Contextual Info: HEF4024B 7-stage binary counter Rev. 04 — 2 September 2009 Product data sheet 1. General description The HEF4024B is a 7-stage binary ripple counter with a clock input CP , and overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (Q0 to


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    hef4024bhef4024bphef4024btmo-001+2qrd11hef4024bcn PDF

    musical bell

    Abstract: musical FREQUENCY DIVIDER 741 DIP14 PCD3311 PCD3311C PCD3311CP PCD3311CT PCD3312C PCD3312CP PCD3312CT
    Contextual Info: Philips Semiconductors Product specification DTMF/modem/musical-tone generators CONTENTS 1 FEATURES 2 GENERAL DESCRIPTION 3 QUICK REFERENCE DATA 4 ORDERING INFORMATION 5 BLOCK DIAGRAM 6 PINNING INFORMATION 6.1 6.2 6.3 6.4 6.5 6.6 Pinning PCD3311 CP Pin description PCD3311CP


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    pcd3311cpcd3312cpcd3311pcd3311ct+6musical bellmusical frequency divider741 dip14pcd3311cppcd3312cppcd3312ct PDF