74HC73 Search Results
74HC73 Result Highlights (3)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| CD74HC73E | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125 |
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| CD74HC73M96 | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 |
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| CD74HC73MT | Texas Instruments | High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 |
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74HC73 Datasheets (29)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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| 74HC73 | Philips Semiconductors | Dual JK flip-flop with reset negative-edge trigger | Original | 48.29KB | 7 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73D | NXP Semiconductors | Dual JK flip-flop with reset; negative-edge trigger | Original | 95.78KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73D | Philips Semiconductors | Dual JK flip-flop with reset negative-edge trigger | Original | 53.53KB | 7 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73D | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 40.04KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73D,652 | NXP Semiconductors | Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 77 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V; Package: SOT108-1 (SO14); Container: Bulk Pack, CECC | Original | 96KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73D,653 | NXP Semiconductors | Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 77 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V; Package: SOT108-1 (SO14); Container: Reel Pack, SMD, 13", CECC | Original | 96KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73DB | NXP Semiconductors | Dual JK flip-flop with reset; negative-edge trigger | Original | 95.78KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73DB | Philips Semiconductors | Dual JK flip-flop with reset negative-edge trigger | Original | 53.53KB | 7 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73DB | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 40.04KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73DB,112 | NXP Semiconductors | Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 77 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V; Package: SOT337-1 (SSOP14); Container: Tube | Original | 96KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73DB,118 | NXP Semiconductors | Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 77 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V; Package: SOT337-1 (SSOP14); Container: Reel Pack, SMD, 13" | Original | 96KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73DB-T | NXP Semiconductors | Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 77 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V | Original | 96KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73DB-T | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 40.04KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73D-T | NXP Semiconductors | Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 77 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V | Original | 96KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73D-T | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 40.04KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73DW | Philips Semiconductors | Dual JK flip-flop with reset, negative-edge trigger | Original | 53.53KB | 7 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73N | NXP Semiconductors | Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 77 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V | Original | 96KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73N | Philips Semiconductors | Dual JK flip-flop with reset negative-edge trigger | Original | 53.53KB | 7 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73N | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 40.04KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC73N,652 | NXP Semiconductors | Dual JK flip-flop with reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Reset; Negative-Edge Trigger ; Fmax: 77 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 16@5V ns; Voltage: 2.0-6.0 V; Package: SOT27-1 (DIP14); Container: Bulk Pack, CECC | Original | 96KB | 16 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
74HC73 Price and Stock
Nexperia 74HC73D-Q100/HIJ74HC73D-Q100/HIJ |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74HC73D-Q100/HIJ | 185,000 | 755 |
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74HC73D-Q100/HIJ | 185,000 | 1 |
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Nexperia 74HC73DB,118Flip Flop JK-Type Neg-Edge 2-Element 14-Pin SSOP T/R |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74HC73DB,118 | 6,313 | 463 |
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74HC73DB,118 | 6,313 | 1 |
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Nexperia 74HC73PW,112Flip Flop JK-Type Neg-Edge 2-Element 14-Pin TSSOP Bulk |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74HC73PW,112 | 3,089 | 573 |
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| 74HC73PW,112 | 2,980 | 573 |
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Buy Now | |||||||
| 74HC73PW,112 | 2,400 | 573 |
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Buy Now | |||||||
| 74HC73PW,112 | 589 | 573 |
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Buy Now | |||||||
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74HC73PW,112 | 9,154 | 1 |
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Buy Now | ||||||
Renesas Electronics Corporation 74HC73FP-E74HC73FP-E |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74HC73FP-E | 3,000 | 669 |
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Buy Now | ||||||
| 74HC73FP-E | 2,955 | 669 |
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Buy Now | |||||||
| 74HC73FP-E | 1,000 | 669 |
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Buy Now | |||||||
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74HC73FP-E | 7,376 | 1 |
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Buy Now | ||||||
Nexperia 74HC73D/C5J74HC73D/C5J |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74HC73D/C5J | 2,500 | 1,134 |
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74HC73D/C5J | 2,500 | 1 |
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74HC73 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
74hc733
Abstract: 74HC73 74HC73N 74HC73D 74HC73DB 74HC73PW JESD22-A114E SSOP14 SSOP14 package
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74hc7374hc73374hc73n74hc73d+5 | |
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Contextual Info: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD54/74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134C Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 - Revised January 2003 Features Description • Hysteresis on Clock Inputs for Improved Noise |
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cd54/74hc73cd74hct73schs134chc/hct107+5 | |
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Contextual Info: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD54/74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134C Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 - Revised January 2003 Features Description • Hysteresis on Clock Inputs for Improved Noise |
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cd54/74hc73cd74hct73schs134chc/hct107 | |
74HC73
Abstract: 74HCT73 74HC-HCT73 74hc73 data sheet 74HC 74HC73D 74HC73DB 74HC73N 74HC73PW C11K
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74hc7374hct7374hc-hct7374hc73 data sheet+6 | |
74HCT73
Abstract: 74HC73 74HCT73 equivalent
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OCR Scan |
cd54/74hc73cd54/74hct7360mhzs-39417+6 | |
HC107BContextual Info: MOTOROLA H SEMICONDUCTOR TECHNICAL DATA MC54/74HC73 Dual J-K Flip-Flop w ith Reset High-Performance Silicon-Gate CMOS J SUFFIX CERAMIC CASE 632-08 The M C 5 4 /7 4 H C 7 3 is id entical in p in o u t to th e LS73. The device in p u ts are c o m patib le w ith standard C M O S o u tp u ts ; w ith p u llu p resistors, th e y are c o m p a tib le w ith |
OCR Scan |
mc54/74hc73mc54hc73mc74hc73hc107+1 | |
74HC73Contextual Info: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD54/74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134A Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 - Revised May 2000 Features Description • Hysteresis on Clock Inputs for Improved Noise |
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cd54/74hc73cd74hct73schs134ahc/hct107+6 | |
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Contextual Info: GD54/74HC73, GD54/74HCT73 DUAL J-K FLIP-FLOPS WITH CLEAR General Description These devices are identical in pinout to the 5 4 /7 4 L S 7 3 . These flip-flops are edge sensitive to the clock input and change state on the negative go ing transition of the clock pulse. Each flip-flop has |
OCR Scan |
gd54/74hc73gd54/74hct73 | |
74HC73
Abstract: 74HCT73
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OCR Scan |
cd54/74hc73cd54/74hct73g01751160mhz+7 | |
74HC73
Abstract: 74HCT73 ND06
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OCR Scan |
cd54/74hc73cd54/74hct7360mhzrca-cd54/74hc73+5 | |
pin DIAGRAM OF IC 74HC73
Abstract: HC73 74HC73 cd54hc73f
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hct73cd54/74hc73cd74hct73schs134a+4 | |
74hc73Contextual Info: Technical Data CD54/74HC73 CD54/74HCT73 File Number 1721 Dual J-K Flip-Flop with Reset Negative-Edge Trigger FUNCTIONAL DIAGRAM Type Features: • Hysteresis on clock inputs for improved noise im m unity and increased input Rise and Fall times. ■ Asynchronous Reset |
OCR Scan |
cd54/74hc73cd54/74hct7360mhzrca-cd54/74hc73+3 | |
74hc73
Abstract: K291 HC107
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OCR Scan |
mc54/74hc73hc10774hc73k291 | |
74HC9046
Abstract: 74hc128 74HCT4050 74HC1284 74hct133 74HCT4049 74HC7014 74hc164 74HC192 74HC93
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74hcu0474hctu0474hc0074hct00+16 | |
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Three-axis inclinometers
Abstract: D flip-flop to T Flipflop circuit converter CS501X LM337 LM317L LM79L05AC Single R-S-T Flip-Flop LM78L05 74HC107 74HC14
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cs501xan08rev4lm337llt1019-5+11 | |
74HC9046
Abstract: 74HCT4050 74hct7014 74HCT4049 74HC7541 74hct133 74HC9046A 74HC90 74HCT4059 74HC5555
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74hcu0474hctu0474hc0074hct00+16 | |
Nichicon Capacitor
Abstract: max195
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16-bit85kspsmax195max195bc+1 | |
M74HC73Contextual Info: r r z SGS-THOMSON Ä T # RÆ[« om[I(gra «S M54HC73 74HC73 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • HIGH SPEED f MAX = 75 MHz (TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 2 (iA (MAX.) AT Ta = 25 *C . HIGH NOISE IMMUNITY V nih = V nil = 28 % V c c (MIN.) |
OCR Scan |
m54hc73m74hc7354/74ls7354hc73f1r+6 | |
k2645
Abstract: k4005 U664B mosfet k4005 MB8719 transistor mosfet k4004 SN16880N stk5392 STR451 BC417
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mk135mk136mk137mk138+16 | |
TDA0161 equivalent
Abstract: 1N3393 BDX54F equivalent byt301000 bux transient voltage suppressor ST90R9 ua776mh sgs 2n3055 Transistor morocco mje13007 inmos transputer reference manual
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OCR Scan |
tda0161 equivalent1n3393bdx54f equivalentbyt301000+6 | |
LM093XMLN
Abstract: hitachi LM093XMLN RG1 7805 7805 rg1 tm5320 bc558b 74HC373 74hc374 LM093 1n4148 zener diode D811
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tms320c50spra302warr10klm093xmln+9 | |
pin DIAGRAM OF IC 74HC73
Abstract: MAX194ACWE MAX194AEPE MAX194AEWE MAX194BCPE MAX194BCWE MAX194BEPE MAX194BEWE MAX195 MAX194
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14-bit85kspsmax194pin diagram of ic 74hc73+8 | |
HD63143
Abstract: lcd LM032L HM514260-7 74HC14 oscillator application note lcd LM032L data sheet LM032L LM032L SPECIFICATIONS RAM circuit diagram H8/3003 74hc09
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h8/3003hd63143lcd lm032lhm514260-7+6 | |
schematic diagram atx Power supply 500w
Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
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p462-ndp463-ndlng295lfcp2ulng395mftp5u+11 | |