UTRON TECHNOLOGY Search Results

Y1 XTAL 12Mhz

Abstract: schematic diagram usb flash ram Alcor Micro schematic flash disk usb flash disk controller flash disc schematic pdf schematic flash disk 10UF 12MHZ 18PF
Contextual Info: UTRON Technology Inc. UT8A102 USB Flash Disk Controller Rev1.0 2002/02/17 UTRON TECHNOLOGY INC. P10003 1F, NO.11, R&D RD. II, SCIENCE-BASED INDUSTRIAL PARK, HSINCHU, TAIWAN, R.O.C. TEL: 886-3-5777882 FAX: 886-3-5777919  UTRON UT8A102 USB Flash Disk Controller

Contextual Info:  UTRON Rev. 1.2 UT66L51216 512K X 16 BIT LOW POWER CMOS SRAM REVISION HISTORY REVISION Rev. 1.0 Rev. 1.1 Rev. 1.2 DESCRIPTION Original. Revised AC / DC ELECTRICAL CHARACTERISTICS 1. Revised Function block diagram 2. Revised 48TFBGA ball size UTRON TECHNOLOGY INC.

UT62257CPC-70

Abstract: UT62257CPC-70L UT62257CPC-70LL UT62257CSC-35 UT62257CSC-35L P80062
Contextual Info:  UTRON UT62257C 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 REVISION HISTORY REVISION Preliminary Rev. 0.1 Rev. 1.0 Rev. 1.1 DESCRIPTION Original. 1.TRUTH TABLE 2.DC ELECTRICAL CHARACTERISTICS Add order information for lead free product UTRON TECHNOLOGY INC.

Utron SRAM 512K X

Abstract: P8008
Contextual Info:  UTRON Preliminary Rev. 0.1 UT62L51316 I 512K X 16 BIT LOW POWER CMOS SRAM REVISION HISTORY REVISION Preliminary Rev. 0.1 Original. DESCRIPTION UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882

P8008

Abstract: VDR 0047 P80081 UT61L12816 128K x 16-bit
Contextual Info:  UTRON Preliminary Rev. 0.1 UT61L12816 128K X 16 BIT HIGH SPEED CMOS SRAM REVISION HISTORY REVISION Preliminary Rev. 0.1 Original. DESCRIPTION UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882

UT62L1024

Abstract: UT62L1024LC-55LI UT62L1024LC-55LLI UT62L1024SC-55LI UT62L1024SC-55LLI UT62L1024SC-70LI UT62L1024SC-70LLI
Contextual Info:  UTRON UT62L1024 I 128K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 REVISION HISTORY REVISION Rev. 1.0 Rev. 1.1 DESCRIPTION Original. Add order information for lead free product UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

p80093

Abstract: VDR 0047 UT62L6416
Contextual Info:  UTRON UT62L6416 I 64K X 16 BIT LOW POWER CMOS SRAM Rev. 1.1 REVISION HISTORY REVISION Rev. 1.0 Rev. 1.1 DESCRIPTION Original. Add order information for lead free product UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

UT62W64CPC-70L

Abstract: UT62W64CPC-70LL UT6264C UT62W64C-35 UT62W64C-70
Contextual Info:  UTRON UT62W64C 8K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 REVISION HISTORY REVISION Rev. 1.0 DESCRIPTION Original. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

UT62256CPC-70LLE

Abstract: UT62256C UT62256CPC-70E UT62256CPC-70LE UT62256CSC-35E UT62256CSC-35LE UT62256CSC-35LLE UT62256CSC-70E E32K
Contextual Info:  UTRON UT62256C E 32K X 8 BIT LOW POWER CMOS SRAM Rev. 1.0 REVISION HISTORY REVISION Rev. 1.0 DESCRIPTION Original. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

VDR 0047

Contextual Info:  UTRON Preliminary Rev. 0.2 UT61L25616 256K X 16 BIT HIGH SPEED CMOS SRAM REVISION HISTORY REVISION DESCRIPTION Preliminary Rev. 0.1 Original. Preliminary Rev. 0.2 1. Revised Pin number UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

UT61L1024

Abstract: UT61L1024JC-12E UT61L1024JC-15E UT61L1024KC-12E UT61L1024KC-15E
Contextual Info:  UTRON Rev 1.0 UT61L1024 E 128K X 8 BIT HIGH SPEED CMOS SRAM REVISION HISTORY REVISION Rev. 1.0 DESCRIPTION Original. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

P8008

Contextual Info:  UTRON Rev. 1.1 UT65L1616 E /UT65L1616(I) 1M X 16 BITS LOW POWER PSEUDO SRAM REVISION HISTORY REVISION Rev. 1.0 Rev. 1.1 DESCRIPTION Original. Delete Partial refresh function Draft Date Apr 15, 2003 Aug 06,2003 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

UT6164CJC-10

Abstract: UT6164CJC-12 UT6164CJC-15 UT6164CLS-10 ce202 Utron Technology
Contextual Info:  UTRON UT6164C 8K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.1 REVISION HISTORY REVISION Rev. 1.0 Rev. 1.1 DESCRIPTION Original 1. Revised Page 8 : 28 STSOP DIMENSION : a. Db D, b. D HD UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

tsop i 12mmx20mm

Abstract: Utron SRAM Utron SRAM 512K X
Contextual Info:  UTRON Rev. 1.1 UT65L168 E /UT65L168(I) 512K X 16 BITS LOW POWER PSEUDO SRAM REVISION HISTORY REVISION Rev. 1.0 Rev. 1.1 DESCRIPTION Original. 1. Delete Partial refresh function 2. Add Package : 48-pin 12mmX20mm TSOP-I UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

64KX64

Abstract: p8000 UT6164C64AQ UT6164C64A
Contextual Info:  UTRON UT6164C64A 64K X 64 SYNCHRONOUS PIPELINED BURST CMOS SRAM Rev 1.1 FEATURES Single 3.3V -5% and +10% power supply Support 2.5V I/O Fast clock access time:

UT6264BPC-70LL

Abstract: UT6264BPC-70 UT6264BPC-70L UT6264BSC-35 UT6264BSC-35L UT6264BSC-35LL P80039 ut6264
Contextual Info:  UTRON UT6264B 8K X 8 BIT LOW POWER CMOS SRAM Rev 1.0 FEATURES The UT6264B is a 65,536-bit low power CMOS static random access memory organized as 8,192 words by 8 bits. It is

28-pin SOJ SRAM

Abstract: UT61256CJC-12 UT61256C UT61256CJC-10 UT61256CJC-15 UT61256CJC-8 UT61256CLS-10 UT61256CLS-12 UT61256CLS-8
Contextual Info:  UTRON UT61256C 32K X 8 BIT HIGH SPEED CMOS SRAM Rev. 1.2 FEATURES The UT61256C is a 262,144-bit high-speed CMOS static random access memory organized as 32,768 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology.

ut6210245

Abstract: UT621024SC-70LL UT621024 UT621024PC-35L UT621024PC-35LL UT621024SC-35L UT621024-70
Contextual Info:  UTRON UT621024 128K X 8 BIT LOW POWER CMOS SRAM Rev. 1.5 GENERAL DESCRIPTION FEATURES The UT621024 is a 1,048,576-bit low power CMOS static random access memory organized as 131,072 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology.

UT61L256CJC-10

Abstract: UT61L256CJC-12 UT61L256CJC-15 UT61L256CLS-10 Utron Technology
Contextual Info:  UTRON Rev. 1.1 UT61L256C 32K X 8 BIT HIGH SPEED CMOS SRAM REVISION HISTORY REVISION Preliminary Rev. 0.1 Rev. 1.0 Rev. 1.1 DESCRIPTION Original Sample ready and release Add package 28-pin 300 mil skinny PDIP & Package outline dimension DATE May 4,2001

UT6264C

Abstract: UT6264CPC-35 UT6264CPC-35L UT6264CPC-35LL UT6264CPC-70 UT6264CPC-70L
Contextual Info:  UTRON UT6264C 8K X 8 BIT LOW POWER CMOS SRAM Rev. 1.1 FEATURES The UT6264C is a 65,536-bit low power CMOS static random access memory organized as 8,192 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology. Access time : 35/70ns max.

32PIN

Abstract: UT61512 UT61512-12 UT61512-15 UT61512-8 UT61512JC-12 UT61512JC-15 UT61512JC-8 UT61512LC-8 P80021
Contextual Info: UTRON UT61512 64K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.2 FEATURES GENERAL DESCRIPTION Fast access time : 8/12/15 ns max. Low operating power consumption : 100 mA (typical) Single 5V power supply All inputs and outputs TTL compatible Fully static operation

UT6264CPC-70LL

Abstract: UT6264C UT6264CPC-35 UT6264CPC-35L UT6264CPC-35LL UT6264CPC-70 UT6264CPC-70L UT6264CSC-70LLE ut6264
Contextual Info:  UTRON UT6264C 8K X 8 BIT LOW POWER CMOS SRAM Rev. 1.3 REVISION HISTORY REVISION Preliminary Rev. 0.1 Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 DESCRIPTION Original. Revised - The timeing waveforms add CE2 control pin Revised - Package outline dimension - Waveform.

UT6264CPCL-70LL

Abstract: UT6264CSCL-70LL UT6264CPCL-70LLE UT6264CPCL-70L UT6264CPCL UT6264C UT6264CPC-35 UT6264CPC-35L UT6264CPC-35LL UT6264CPC-70
Contextual Info:  UTRON UT6264C Rev. 1.4 8K X 8 BIT LOW POWER CMOS SRAM REVISION HISTORY REVISION Preliminary Rev. 0.1 Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Rev. 1.4 DESCRIPTION Original. Revised - The timeing waveforms add CE2 control pin Revised - Package outline dimension

VDR 0047

Abstract: UT61L25616MC-10 Utron Technology
Contextual Info:  UTRON Rev. 1.0 UT61L25616 256K X 16 BIT HIGH SPEED CMOS SRAM REVISION HISTORY REVISION DESCRIPTION Preliminary Rev. 0.1 Original. Preliminary Rev. 0.2 1. Revised Pin number Rev. 1.0 1. Revised Standby current : 10/2mA max 0.5mA(typ.) 2. Delete ICC1, ICC2