TTL IC TESTER Search Results

Contextual Info: a WHITE /M IC R O E L E C T R O N IC S 128Kx48 3.3V SRAM MODULE W S128K48V-XG4W X ADVANCED* FEATURES • A c c e s s Tim es 1 5 , 1 7 , 2 0 , 25 n s ■ Pa ckaging 2 V Data Retention D e vice s A vailab le ■ TTL C om patible Inputs and Outputs Low Pow er Version

csi4

Contextual Info: C3 WS512K32B-XXXE I/VHITE /M IC R O E L E C T R O N IC S 512 K x3 2 S R A M M 0 D U LE preliminary* FEATURES • Access Times of 15,17, 20, 25ns ■ TTL Compatible Inputs and Outputs ■ Low Power BiCMOS ■ 5 Volt Power Supply ■ Packaging ■ Built-in Decoupling Caps and Multiple Ground Pins for Low

DB50 connector

Abstract: FB100 FB100A CD 4501 FB2000A IEEE488 RS-449 prbs noise generator OP210 IEEE-448
Contextual Info: Fastbit FB100A BER Test System Highly flexible BER test system for serial and parallel testing over a wide range of interfaces from TTL to optical. Addresses system, sub-system and component testing during development and compliance verification in IC, cable, satellite, cellular, terrestrial, CATV, digital TV and other physical

Contextual Info: M O S E L V IT E L IC MS62256L 32K x 8 CMOS STATIC RAM Features Description • High-speed - 70/100 ns ■ Low Power dissipation: MS62256L - 385mW Max. Operating - 550fiW (Typ.) Power Down ■ Fully static operation ■ All inputs and outputs directly TTL compatible

MS62256L-70NC

Contextual Info: M O SEL V IT E L IC MS62256L 3 2K x 8 CMOS STATIC RAM Features Description • High-speed - 70/100 ns ■ Low Power dissipation: MS62256L - 385mW Max. Operating - 550|aW (Typ.) Power Down ■ Fully static operation ■ All inputs and outputs directly TTL compatible

DB50 connector

Abstract: DB50 FB100 IEEE-448 RJ45 modular jack FB100A mds wireless broadband specifications tv pattern generator FB2000A IEEE488
Contextual Info: Fastbit FB100A BER Test System Highly flexible BER test system for serial and parallel testing over a wide range of interfaces from TTL to optical. Addresses system, sub-system and component testing during development and compliance verification in IC, cable, satellite, cellular, terrestrial, CATV, digital TV and other physical

I01b-1

Abstract: 01b SMD
Contextual Info: WHITE /M IC R O E L E C T R O N IC S Ç 2 W S512K32-XXX 512Kx32 SRAM MODULE. SMD 5962-94611 PRELIMINARY* FEATURES • A ccess Tim es o f 70, 8 5 , 1 0 0 , 120ns ■ C om m ercial, In d u stria l and M ilita ry T e m pe ratu re Ranges ■ Packaging ■ TTL C om p atible Inputs and O utputs

Contextual Info: I |T E r j 1 I LM CLfA I HIGH COLLECTOR-EMITTER VOLTAGE TYPE LTV713F/LTV713FS/LTV713FM • FEATURES 1 Directly connectable to TTL 2 Current transfer ratio C T R : MIN. 50% at If = 5mA, V ce =5V 3. Low collector dark current (Ic eo : MAX. 1Cr7A at V c e -

S-8225

Abstract: MS62256CLL-10PC
Contextual Info: MOSEL- VITELIC MS62256C 32K x 8 CMOS STA TIC RAM Features Descriptions • High-speed - 70/100 ns ■ Low Power dissipation: — 385mW Max Operating — 16.5mW (Max) Standby — 0.55mW (Max) Power-down — 5|iA (Max) Ic c d r ■ Fully static operation ■ All inputs and outputs directly TTL compatible

Contextual Info: M O SE L V IT E L IC PRELIMINARY V62C3181024 2.7 VOL T 1 2 8 K X 8 STA TIC RAM Features • Packages - 32-pin TSOP Standard ■ High-speed: 35, 0 ns ■ Ultra low DC operating current of 3mA (max.) - TTL Standby: 3 mA (Max.) - CMOS Standby: 50 nA (Max.)

Contextual Info: ca W S128K64V-XG4W X WHITE /M IC R O E L E C T R O N IC S 128Kx64 3.3V SRAM MODULE ADVANCED* FEATURES • A c c e s s T im es of 1 5 ,1 7 , 20, 25ns ■ 2 V Data R eten tion D e vices A v a ila b le Low P ow er V ersion ■ Packaging ■ TTL C o m p a tib le Inputs and O utputs

Contextual Info: PRELIMINARY SYNERGY TTL BICMOS STATIC RAM 6 4 K 1 6 K X 4-BIT S E M IC O N D U C T O R ' ' DESCRIPTION FEATURES • Address access time, tAA: 7/10/12ns max. ■ Chip select access time, tAcs: 4/6/7nsmax. ■ Popular 16K x 4 with common I/O organization

Contextual Info: M O S E L V tT E L IC MS6264H 8K x 8 HIGH SPEED CMOS STATIC RAM Preliminary Features Description • High-speed - 15/20 ns ■ Low Power dissipation: — 825mW Max. Operating — 550(xW (Max.) Power Down ■ 5 V + 10% supply ■ Fully static operation ■ TTL compatible I/O

Contextual Info: PRELIMINARY SYNERGY S E M IC O N D U C T O R TTL BICMOS STATIC RAM 64K 16K X 4-BIT K 1 DESCRIPTION FEATURES • ■ ■ ■ ■ Address access time, tA A : 7/10/12ns max. Chip select access time, tACs: 4/6/7nsmax. Popular 16K x 4 with common I/O organization

z920

Contextual Info: MOSEL VI TEL IC P R ELIM IN A R Y V62C51864 8 K X 8 S TA TIC R A M Features Description • High-speed: 35, 70 ns ■ Ultra low DC operating current of 5mA max. ■ Low Power Dissipation: - TTL Standby: 2 mA (Max.) - CMOS Standby: 15 jjA (Max.) ■ Fully static operation

18p8

Abstract: 18v8 23S8
Contextual Info: _ * Gl GA23SV8/GA23S8 gazelle H ig h -P erfo rm an ce L o g ic D e v ice G alliu m A rse n id e _ G e n e ra l D e scrip tio n G azelle’s GA23SV8/GA23S8 are TTL-compatible high-perform­ ance logic sequencers. Based on the fam iliar programmable

Contextual Info: High-Speed C M O S 9 r 1-of-8 Decoders QS54/74FCT238T Q u a lity S em ic o n d u c to r , I n c . FEATURES/BENEFITS DESCRIPTION • • • • • • • • • The QSFCT138T and QSFCT238T are high-speed CMOS TTL-compatible high-speed binary decod­

V62C51864

Abstract: 8KX8-Bit CMOS SRAM
Contextual Info: M O S E L V IT E L IC V62C 51864 8K x8 B IT STA TIC R A M P R B fflO B M W Features Description • High-speed: 35, 45, 55, 70 ns ■ Ultra low DC operating current of 5mA Max. ■ Low Power dissipation: TTL Standby: 4mA (Max.) CMOS Standby: 20|iA (Max.)

Contextual Info: MOSEL V IT E L IC PRELIMINARY V62C5181024 1 2 8 K X 8 S TA TIC R A M Features • Packages - 32-pin TSOP Standard - 32-pin 600 mil PDIP - 32-pin 440 mil SOP (525 mil pin-to-pin) ■ High-speed: 35, 70 ns ■ Ultra low DC operating current of 5mA (max.) TTL Standby: 5 mA (Max.)

ga22vp10-7 gazelle

Abstract: 80386 80386 microprocessor pin out diagram Federal fuse switch GA22V10
Contextual Info: GA22VP10-10 H ig h -P e rfo rm a n c e Lo gic D e v ic e G a lliu m A rsen id e g a z e l l e ,— -F e a tu re s G en eral D e s c rip tio n Gazelle’s GA22VP10 is a TTL-compatible, high-performance logic device HPLD .

Contextual Info: 1 Q S High-Speed C M O S 51 r 1 -of-8 Decoders QS54/74FCT238T u a l it y e m ic o n d u c t o r , I n c . FEATURES/BENEFITS DESCRIPTION • • • • • • • • • The QSFCT 138T and QSFCT238T are high-speed CMOS TTL-compatible high-speed binary decod­

62C51864

Contextual Info: M OSEL V I T E L I C P R E L IM IN A R Y V 62C 51864 8 K X 8 S T A T IC R A M Features Description • High-speed: 35, 70 ns ■ Ultra low DC operating current of 5mA max. ■ Low Power Dissipation: - TTL Standby: 2 mA (Max.) - CMOS Standby: 15 ^A (Max.)

Contextual Info: a WS512K32B-XXXE M/HITE /M ICROELECTRONICS 512Kx32 SRAM MODULE PRELIMINARY* FEATURES A c c e s s T i m e s o f 1 5 , 1 7 , 20, 2 5 n s • TTL C o m p a t i b l e In p u ts a nd O u tp u t s ■ L o w P o w e r B iC M O S ■ 5 V o l t P o w e r S u p p ly

Contextual Info: WPS256K32-XPJX M/HITE /MICROELECTRONICS 256Kx32 SRAM MODULE ADVANCED* FEATURES • ■ A c c e s s T im e s ■ C o m m e r c ia l a nd In d u s tr ia l T e m p e r a t u r e R a ng e s B iC M O S : 1 2 , 1 5 n s ■ TTL C o m p a t i b l e In p u ts a nd C M O S O u tp u t s