23S8 Search Results

AMD socket s1

Contextual Info: AmPAL*23S8 20-Pin IMOX PAL-Based Sequencer AmPAL*23S8 PRELIMINARY DISTINCTIVE CHARACTERISTICS 14 Registers - 4 Output Logic Macrocells OLMs - 4 Output Registers - 6 Buried State Registers (BSRs) 23 possible array inputs and 8 outputs in a 20-pin package

EPLD 5128

Contextual Info: September 1991, ver. 2 Introduction Application Brief 73 Altera provides a variety of softw are utility pro gra m s that co m p le m e n t the M A X + P L U S II, M A X + P L U S , A + P L U S , S A M + P L U S , a n d M C M a p d ev elop m en t systems. These pro gram s are available via Altera's electronic bulletin board service

C344111

Abstract: J1344 econoseal
Contextual Info: 8 5 7 2 3 . DO NOT SCALE DIMENSIONS IN MM. H C.A'D, FILE CODE b 'q\r m o -& r If O O o o IN CM <\1 - p 30. SO 70. 80 f<3- R ] .00 -êh 2.50 ± 0.25 TYP 2 3 P L A C E S TYP D D C C o UN ri 26. 75 ±0. 25 B B CUSTOMER DUG FOR REFERENCE ONLY RELEASED FOR PUBLICATION

Contextual Info: GA23SV8/23S8 High-Perform ance Logic Device Gallium Arsenide gazelle _ G eneral Description Features Gazelle’s GA23SV8/23S8 are TTL-compatible high-performance logic sequencers. Based on the fam iliar programmable array logic architecture, they provide highest performance and

ats 2300

Abstract: A23S8
Contextual Info: GA23SV8/23S8 gazelle High-Perform ance Logic Device Gallium Arsenide _ Features G eneral Description G azelle’s GA23SV8/23S8 are TTL-compatible high-perform­ ance logic sequencers. Based on the fam iliar programmable array logic architecture, they provide highest performance and

ferranti ula

Abstract: pia 6820 yx 805 led driver IC CD 4440 cs pic RAM 2102 RADIO SHACK PARTS CROSS REF 74L73 8251 UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER yx 801 led driver 1702a eprom
Contextual Info: O <D & P o O o o ^ 0 3 1 0897-X $ 1 4.50 THE S-100 BUS HANDBOOK Dave Bursky H e r e ’s a c o m p re h e n s iv e b o o k th a t d is c u s s e s th e S -1 0 0 bus e q u ip m e n t an d h o w it is o rg a n iz e d . It c o v e rs c o m p u te r fu n d a m e n ta ls , b a s ic e le c tro n ic s ,

18p8

Abstract: 18v8 23S8
Contextual Info: _ * Gl GA23SV8/23S8 gazelle H ig h -P erfo rm an ce L o g ic D e v ice G alliu m A rse n id e _ G e n e ra l D e scrip tio n G azelle’s GA23SV8/23S8 are TTL-compatible high-perform­ ance logic sequencers. Based on the fam iliar programmable

Contextual Info: n DRAWING T H IS MADE IN THIRD ANGLE PROJECTION D R A W IN G c IS U N P U B L IS H E D . COPYRIGHT 19 R ELEASED BY AMP FOR P U B LIC A T IO N IN C O R PO R ATED . A LL LOC ,1 9 IN TERNATIONAL RIGHTS D IS T u RESERVED. 14 R E V IS IO N S p F LTR ZONE F D E S C R IP TIO N

2N2222A 338

Abstract: TFK 949 2N1167 halbleiter index transistor ad161 BSY19 al103 ac128 TFK 404 Tfk 931
Contextual Info: Towers' International Transistor Selector Towers’ International Transistor Selector Specification data for the identification, selection and substitution of transistors by T D Towers, MBE, MA, BSc, C Eng, MIERE Revised Edition U p date One London: NEW YORK

Contextual Info: G A Z E L L E M ICR O CIR C U ITS INC 14E 0 § 3 â 3 t,[m 0000033 5 | GA23SV8/23S8 g a z e lle High-Perform ance Logic D evice G allium A rsenide _ G eneral D escription Gazelle’s GA23SV8/23S8 are TTL-compatible high-perform­ ance logic sequencers. Based on the familiar programmable

PAL16R4B

Abstract: PALCE22V100-25 PAL16l8 MMI PAL16l8A MMI PAL24 4126P pal20r4b PAL20L10A TTL 555 PAL16L8B-4
Contextual Info: PAL Device/ Sequencer/FPGA Menu Standard PAL Devices Family 16R8 Package Technology Inpula I/O Outpula Product Term »/Output PAL16L8-7 PAL16R8-7 PAL16R6-7 PAL16R4-7 20P.D.J TTL 10 8 8 8 6 Comb 2 Comb 8 Reg 6 Reg 4 Reg 7 8 7.8 7.8 PAL16L8D PAL16R8D PAL16R6D