TTL AMP Search Results

Contextual Info: ^ TTL CONTROLLED AMPLIFIERS AFTL SERIES FEATURES • TTL Switched Power Supply • Built-In TTL Driver • Ideal for: - Remote Power Control - Low Power Consumption - Thermal Management Systems • Standard AFS Low Noise Performance • Specifications: - Rise Time <2.0 ps

740L6000

Abstract: transistor c2026 c2026 c2026 transistor data 740L6010 transistor equivalent c2026 740L6011 C2026 TRANSISTOR 740L6001 c2037
Contextual Info: HIGH-SPEED LOGIC-TO’LOGIC OPTOCOUPLERS OPTOELECTRONICS TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER LSTTLto ORDER INFORMATION LOGIC COMPATIBILITY PART NUMBER INPUT OUTPUT TTL 740L6000 LSTTL TTL 740L6001 LSTTL CMOS 740L6010 LSTTL CMOS 740L6011 LSTTL

Contextual Info: DS75365 DS75365 Quad TTL-to-MOS Driver Literature Number: SNOSBR5A DS75365 Quad TTL-to-MOS Driver Y The DS75365 is a quad monolithic integrated TTL-to-MOS driver and interface circuit that accepts standard TTL input signals and provides high-current and high-voltage output

IC TTL 74LS00

Abstract: TTL LS 7400 IC TTL 74 ls 04 7400 fan-out cmos 7400 fan-out TTL 7400 catalog TTL 74ls00 TTL 7400 rise and fall time of ic 74ls00 74LS00 gate
Contextual Info: Design Considerations, Testing and Applications Assistance Form FAST AND LS TTL FAST AND LS TTL DATA 3-1 3 DESIGN CONSIDERATIONS SELECTING TTL LOGIC. TTL Families may be mixed in a system for optimum performance. For instance, in new designs, ALS would commonly be used in non-critical speed paths to minimize power consumption while FAST TTL would be used in high

Contextual Info: DS75361 DS75361 Dual TTL-to-MOS Driver Literature Number: SNOSBR4A DS75361 Dual TTL-to-MOS Driver General Description Features The DS75361 is a monolithic integrated dual TTL-to-MOS driver interface circuit The device accepts standard TTL input signals and provides high-current and high-voltage

CY101E383

Abstract: E383 R2170 ecl 84
Contextual Info: E383 CY101E383 ECL/TTL/ECL Translator and High-Speed Bus Driver Features • BiCMOS for optimum speed/power • High speed max. — 3.0 ns tPD TTL-to-ECL Functional Description The CY101E383 is a new-generation TTL-to-ECL and ECL-to-TTL logic level translator designed for high-perfor-

profibus rs485 9 pin 15 pin

Abstract: rs449 pinout RS 485 eia EIA-485 TTL to RS 422 converts RS-449 EIA-232 EIA-422 RS-423 profibus rs485 9 pin
Contextual Info: Intro to Serial Transceivers April 2010 What is a Transceiver? • Transmitter converts CMOS/TTL levels to Electrical Interface Standards • Receiver converts Electrical Interface Standard levels to CMOS/TTL outputs CMOS/TTL 2 Transceiver Electrical Interface

Sequencers

Contextual Info: Data Sheets TTL/CMQS PAL Devices TTL/CMOS AmPAL Devices PROSE/PLS Sequencers FPC/PEG Sequencers ECL PAL Devices HAL/ZHAL Devices Military PAL Devices Logic Ceil Array Electrical Definitions £1 MonoffMoilOnfoinorfes 5-1

2n2222 fairchild

Abstract: 74OL60XX
Contextual Info: 74OL6000, 74OL6001, 74OL6010, 74OL6011 Optoplanar High-Speed Logic-to-Logic Optocouplers LSTTL to TTL Buffer TTL Inverter CMOS Buffer CMOS Inverter Description 74OL6000 74OL6001 74OL6010 74OL6011 Features • Industry first LSTTL to TTL and LSTTL to CMOS

transistor c2026

Abstract: c2026 transistor data 740L6000 c2028 transistor data C2036 c2026 transistor equivalent c2026 C2037 transistor C2003 740L6000 equivalent
Contextual Info: eu HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS OPTOELECTRONICS OPTO/LOGIC TTL BUFFER TTLINVERTER CMOS BUFFER CMOS INVERTER LSTTL to \ TM ORDER INFORMATION LOGIC COMPATIBILITY PART NUMBER INPUT OUTPUT 740L6000 LSTTL TTL TTL 740L6001 LSTTL 740L6010 LSTTL CMOS 740L6011 LSTTL

Contextual Info: 100325 100325 Low Power Hex ECL-to-TTL Translator Literature Number: SNOS129A 100325 Low Power Hex ECL-to-TTL Translator General Description Features The 100325 is a hex translator for converting F100K logic levels to TTL logic levels. Differential inputs allow each circuit

Contextual Info: DP8480A DP8480A 10k ECL to TTL Level Translator with Latch Literature Number: SNOSBN8A DP8480A 10k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs

Contextual Info: DP8482A DP8482A 100k ECL to TTL Level Translator with Latch Literature Number: SNOSBO0A DP8482A 100k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs

lvc161284

Abstract: 005 418 Design Seminar Signal Transmission SN74ACT1284
Contextual Info: TTL-type Data Transmission Section 6_4 DATA TRANSMISSION TTL Type Transmission 4-1 TTL-type Data Transmission NOTICE This presentation is a single chapter from the 1996 Mixed Signal Products Seminar. This presentation includes notes which can be read in the notes page view.

Contextual Info: 5V/3.3V 1.25Gbps HIGH-SPEED LIMITING POST AMPLIFIER Micrel, Inc. FEATURES DESCRIPTION 3.3V and 5V power supply option Up to 1.25Gbps operation Low noise Chatter-free LOS generation Open collector TTL LOS output TTL /EN Input Differential PECL inputs for data

led clock circuit diagram

Abstract: ECL IC NAND ic 3842 datasheet DAC ic 0808 pin diagram 3842 smps IC 8 pin ic 3842 MCK12140 application note ADC 10 Ghz 266 XnOR GATE NB3N551
Contextual Info: Complete Clock Management Solutions Processor Skew Tuning 1 HCSL TTL-to-PECL Translator Multiplexer LVDS TTL/CMOS LVDS/HCSL Loop Filter VCO 10 ZDB ASIC Memory 1 CMOS/TTL Divider/ Prescaler PE/EQ Processor 9 1 Discrete PLL Blocks Processor 5 1 PECL/CML Phase

Contextual Info: 100329 100329 Low Power Octal ECL/TTL Bidirectional Translator with Register Literature Number: SNOS122A 100329 Low Power Octal ECL/TTL Bidirectional Translator with Register General Description The 100329 is an octal registered bidirectional translator designed to convert TTL logic levels to 100K ECL logic levels

Contextual Info: 100324 100324 Low Power Hex TTL-to-ECL Translator Literature Number: SNOS128A 100324 Low Power Hex TTL-to-ECL Translator General Description Features The 100324 is a hex translator, designed to convert TTL logic levels to 100K ECL logic levels. The inputs are compatible

Contextual Info: 0.5 TO 2.0 GHz TTL QPSK MODULATOR MODULATOR PRODUCTS MODEL: SMT0502LC1MD Modulation Driven FEATURES • RF/LO Coverage . 0.5 to 2.0 GHz • TTL-controlled I and Q inputs • Amplitude accuracy . ±0.5 dB • QPSK phase accuracy. ±5°

DP8481

Contextual Info: DP8481 DP8481 TTL to 10k ECL Level Translator with Latch Literature Number: SNOSBN9A DP8481 TTL to 10k ECL Level Translator with Latch General Description Features This circuit translates TTL input levels to ECL output levels and provides a fall-through latch The outputs are gated with

Contextual Info: DP8483 DP8483 TTL to 100k ECL Level Translator with Latch Literature Number: SNOSBO1A DP8483 TTL to 100k ECL Level Translator with Latch General Description Features This circuit translates TTL input levels to ECL output levels and provides a fall-through latch The outputs are gated with

Contextual Info: Product Data Sheet VDSGLD @ 38.88 MHz Voltage Controlled Crystal Oscillator Pin Information Table 1. Pin Function Pin Symbol Function 1 VC Control Voltage 2 Tri-State 3 4 5 GND Output TTL/CMOS 6 Vcc TTL logic low disables output TTL logic high enables output waveform

4433 crystal

Abstract: TR650
Contextual Info: Product Data Sheet VDSGLD @ 38.88 MHz Voltage Controlled Crystal Oscillator Pin Information Table 1. Pin Function Pin Symbol Function 1 VC Control Voltage 2 Tri-State 3 4 5 GND Output TTL/CMOS 6 Vcc TTL logic low disables output TTL logic high enables output waveform

microtek ups circuit diagram

Abstract: AZ88943 AZ88943U
Contextual Info: ARIZONA MICROTEK, INC. AZ88943 High-Speed Limiting Post Amplifier FEATURES • • • • • • • PACKAGE AVAILABILITY Up to 2.5Gbps operation Differential PECL Inputs Differential PECL Outputs Open Drain TTL/CMOS SD Output TTL/CMOS Enable Input High-Speed SiGe Process