TTL 74LS02 Search Results

74LS08 fan-in

Abstract: 74LS398 74LS273 74LS14 Hex Inverter definition MC74F579 74LS181 74ls795 74LS299 Decade Up/Down counter 3 State ttl buffer 74LS245
Contextual Info: Selection Information FAST/LS TTL 1 Circuit Characteristics 2 Design Considerations, Testing and Applications Assistance Form 3 FAST Data Sheets 4 LS Data Sheets 5 Reliability Data 6 Package Information Including Surface Mount 7 FAST AND LS TTL DATA CLASSIFICATION

74LS82

Abstract: 74LS176 74LS94 74LS286 74ls150 74LS177 74LS116 74ls198 7400 TTL 74ls521
Contextual Info: GOULD 4055916 GOULD SEMICONDUCTOR SEMICONDUCTOR DIV DIV 03E D | 03E MDSSTlb 09920 D UCICmEU T-4 3I-V 7400 TTL Cells •> GOULD CM OS Gate Array and Standard Cell Library Electronics Features General Description • Over 200 functions available. 7400 TTL Cells, a member of Gould’s EXPERT ASIC

Z427

Abstract: FL 9014 TTL 7409 TTL 7486 74LS32 74ls86 TTL 74s32 74LS08 74LS11 74LS02
Contextual Info: FAIRCHILD DIGITAL TTL SSI FUNCTIONS Cont’d X to x n agic/Conne Diagram igh Speed 54H/74H ns/22 mW O IO U) —1 ligh Speed Schottky 54S/74S ns/19 mW CO Std. TTL 54/74 1 ns/10 mW E a> Dw Power Schottky ILS/74LS ns/2 mW ~'c o u c 3 U. 9000 Series ns/10 mW

74LS08 Quad 2-Input AND Gates

Abstract: TTL 74s32 TTL 7408 or 2 input 74Ls32 74LS11 and 74LS32 74ls32 quad 2-input OR gates 54LS TTL 7421 74LS 3-input NOR 74LS11
Contextual Info: FAIRCHILD DIGITAL TTL High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW Logic/Connection Diagram'2’ E £ Std. TTL 54/74 10 ns/10 mW ~c o o c S U. Low Power Schottky 54LS/74LS 5 ns/2 mW Cont’d 9000 Series 8 ns/10 mW SSI FUNCTIONS 5

74LS02

Contextual Info: I LS TTL DN74LS Series DN74LS02 DN74LS02 Quad 2 - input P ositive NOR Gates • Description P-1 DN 74LS02 contains four 2-input positive isolation NOR gate circuits. ■ Features • • • • Low pow er consum ption Pd = 1 lm W typical High speed ( t pd = 10ns typical)

74IS04

Abstract: crt controller 6845 74S393 faraday xt 74IS74 74IS00 6845e crt controller 74832 block diagram of 74LS138 3 to 8 decoder
Contextual Info: 3486347 FARADAY 84D 00245 ELECTRONICS CORP ELECTRONICS INC 04 DEÌ MONOCHROME DISPLAY CONTROLLER FARADAY FE2200 FEATURES: Generates the CRT Display Controller Clock and Other Timing Signals Uses a Crystal or a TTL Signal for Frequency Source Incorporates Complete

741S157

Abstract: CI 74LS32 74ls20 14 PIN 74IS00 monochrome display 74IS04 6845e Faraday Electronics DT33C crt controller 6845
Contextual Info: 3486347 FARADAY ELECTRONICS CORP 84D FE2200 FEATURES: Generates the CRT Display Controller Clock and Other Timing Signals Uses a Crystal or a TTL Signal for Frequency Source Incorporates Complete Attribute Decoding Provides I/O Channel Synchronization 68 Pin Leaded Surface Mount

transistor cross reference

Abstract: MPT3N40 Westinghouse SCR handbook LT 8224 ZENER DIODE sje389 N9602N npn transistor RCA 467 TFK 7 segment displays PUT 2N6027 delco 466
Contextual Info: C K TBD DOLLY LIST LOGO LIST SAFETY & RELIABLTY TEK PN SYSTEM II DIGITAL IC's MEMORIES. MOS. CM OS.ECL. TTL MICROPROCESSOR SPECIAL FUNCTION IC's DIGITAL / LINEAR ARRAYS LINEAR IC'S (PURCH) TEK-MADE IC’s 3 IC's INDEX (COLORED PGS) INCL PRGMD. SCRND.ETC

7406n

Abstract: 7408n 74193N 7416N 7407N 74181N 74LS01N 7438N 7437N 74h00n
Contextual Info: CYFROWE UKtADY SCALONE TTL SERII UCY 74 . /UCA 64 . Wykaz oznaczen parametrów technicznych poj'emnosc Unii statyczny wspólczynnik wzmocnienia pr^dowego w ukladzie OE "21B pr^d bazy IB IC pr^d kolektora Icc pr^d zasilania ICC+ ICC" OD 011 ICCH ICCH-*'

Contextual Info: SA NY O SEMICONDUCTOR 15E D I CORP 7 clci7G7b O O O S b O D LC74HC02 3003A *• v ’ ~ CM O S High-Speed Standard Logic LC74HC Series Quad 2-Input N O R Gate 16958 Features The LC74HC02 consists of 4 identical 2-input NOR gates. Uses CMOS silicon gate process technology to achieve operating speeds similar to LS-TTL 74LS02 with the

FZH115B

Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
Contextual Info: Digital I.C.s, 74INTEGRATED CIRCUITS DIGITAL TTL, 74LS & 74HC Series Quad 2-input NAND gate Quad 2-input NAND gate, open collector Quad 2-input NOR gate Quad 2-input NOR gate, open collector Hex inverter Hex inverter, O/C collector Hex inverter, Buffer 30V O/P

74LS02 gate diagram

Abstract: IC 74LS02 M54HCT02 M54HCT02F1R M74HCT02 M74HCT02B1R M74HCT02C1R M74HCT02M1R
Contextual Info: M54HCT02 M74HCT02 QUAD 2-INPUT NOR GATE . . . . . . . HIGH SPEED tPD = 11 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

74LS02 gate diagram

Abstract: M54HCT02 M54HCT02F1R M74HCT02 M74HCT02B1R M74HCT02C1R M74HCT02M1R
Contextual Info: M54HCT02 M74HCT02 QUAD 2-INPUT NOR GATE . . . . . . . HIGH SPEED tPD = 11 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

74LS02 gate diagram

Abstract: CI 74LS02 pin diagram of 74ls02 74LS02 IC TTL 74LS02 IC 74LS02 74LSTTL cmos 74ls02 74LS02 truth table 74LSTTL 5V
Contextual Info: SANYO SEMICONDUCTOR 12E CORP LC74HC02M 40 3034 A » 1 7 ci c1 7 0 7 t 1 Q Q 0 2 b 0 4 C M O S High-Speed Standard Logic L C 7 4 H C Series Quad 2-Input NOR Gate 2139A Features • The LC74HC02M consists of 4 identical 2-input NOR gates. • Uses CMOS silicon gate process technology to achieve operating speeds similar to LS-TTL 74LS02 with the

logic diagram of 7432

Abstract: CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi lyi rn

CI 7408

Abstract: 74LS series logic gates CI 7402 TTL 7408 7408 and 7408 TTL CI 74LS08 TTL 7486 7408 CI 74LS86
Contextual Info: FAIRCHILD DIGITAL TTL Quad 2-Input 9015 3 Triple 3-Input — 4 Dual 4-Input w/Strobe — 5 Dual 4-Input Exp — 6 Dual 5-Input — Logic/Connection Diagram12* 2 High Speed Schottky 54S/74S 3 ns/19 mW — 3 LL High Speed 54H/74H 6 ns/22 mW Quad 2-Input E

M74HCT02B1

Abstract: 74LS02 gate diagram 74LS02 74HCT02
Contextual Info: rz 7 SGS-Thomson M54H£I2? Ä 7 # û * M y i g r a K S M 74HCT02 QUAD 2-INPUT NOR GATE • HIGH SPEED tpD =11 ns (TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 1 nA (MAX.) AT Ta = 25 "C ■ COMPATIBLE WITH TTL OUTPUTS ViH = 2V (MIN.) ViL = 0.8V (MAX)

TTL LS 7407

Abstract: CI 7407 CI 7402 TTL LS 7402 ls 7408 TTL 74s02 CI 74LS02 74LS27 TTL 7425 TTL 74ls02
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 D9 54S/74S134 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I E RRRRRRRFl li lli lli lli J lill ill ill iJGND

TTL LS 7406

Abstract: el 7406 74l804 ls 7404 7404 ls 74114 ic 74132 IC 7404 IC TTL 7402 TTL IC 7405
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I Vcc E RRRRRRRFl LiJ ikj Lil l±J UJ LsJ IzJ GND LU D11

dm8130

Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
Contextual Info: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408

54HCT02f

Abstract: CI 74LS02
Contextual Info: S G S -T H O M S O N jL iM s iO (g S 4HCT02 M74HCT02 m s QUAD 2-INPUT NOR GATE • HIG HSPEED tpD = 11 ns (TYP.) AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 1 |iA (MAX.) A T T a = 25°C ■ COMPATIBLE WITH TTL OUTPUTS V ih = 2V (MIN.) V il = 0.8V (MAX)

TTL LS 7407

Abstract: TTL 7427 TTL 7402 LS 7430 LS 7402 74LS02 74LS30 ttl 7407 d1554 TTL 74s02
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I 5T5 R Fl R R R FI FI aia LU 111 111 Li] lij lil L J

7411 pin diagram

Abstract: TTL 7408 DS 7409 74LS574 CI 7408 7407 connection diagram 74LS386 TTL 7408 DIAGRAMS 74LS08 PIN CI 74LS08
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D93 54LS/74LS379 D94 9386, 74LS266, 54LS/74LS386 D95 54LS/74LS398 r ei fi r E5i r?i n Vcc 1 4 5 12 13 4 5 7 6 14 15 17 16 lOa Ila lo b lib lo c lie lo d lid S CP Qa Qb 2 GND Vcc = Pin 20 GND = Pin 10 Vcc = Pin 16

54175

Abstract: 74L02
Contextual Info: LO W -P O W ER S E R I E S 5 4 LS /74 LS S C H O T T K Y - C L A M P E D T R A N S I S T O R - T R A N S I S T O R LO G IC SCHOTTKY+ TTL MS! _ B U L L E T IN N O . D L -S 7 2 1 1 7 7 7, S E P T E M B E R 1972 FOR LOW-POWER, H IG H -PER FO R M A N C E D IG IT A L SYSTEMS