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    TSMC FUSE Search Results

    TSMC FUSE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TCKE800NA
    Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Auto-retry, WSON10B Datasheet
    TCKE800NL
    Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Latch, WSON10B Datasheet
    TCKE805NA
    Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Auto-retry, Fixed Over Voltage Clamp, WSON10B Datasheet
    TCKE805NL
    Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Latch, Fixed Over Voltage Clamp, WSON10B Datasheet
    TCKE812NA
    Toshiba Electronic Devices & Storage Corporation eFuse IC (electronic Fuse), 4.4 to 18 V, 5.0 A, Auto-retry, Fixed Over Voltage Clamp, WSON10B Datasheet

    TSMC FUSE Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    TSMC fuse

    Abstract: bridge rectifier rs 307 TSMC47A TA 618 710 TRANSFORMER EZ 711 253 TSMC36A BRIDGE-RECTIFIER 10v 1A 258 ez 902 TSMC10 TSMC11
    Contextual Info: 6ENL INSTR/ POWER T> 3flE • 3fl^0137 000471*} fl « f i l e T-//-Z3 ♦ • ♦ ♦ ♦ • P ♦R ♦E ♦L • I • M • l » I M » A * R * Y » * • ♦ ♦ ♦ TSMC SERIES SURFACE MOUNT TRANSIENT VOLTAGE SUPPRESSOR VOLTAGE - 6.8 - 200 Volts FEATURES


    OCR Scan
    000471esmc/do-214abtsmc fusebridge rectifier rs 307+8tsmc47ata 618 710 transformerez 711 253tsmc36abridge-rectifier 10v 1a258 ez 902tsmc10tsmc11 PDF

    TSMC fuse

    Abstract: TSMC 40nm TSMC 90nm sram 65nm sram TSMC 40nm layout issue TSMC 40nm SRAM 32nm tsmc tsmc 130nm metal process SONY GERMANIUM TRANSISTOR germanium power devices corporation
    Contextual Info: White Paper Leveraging the 40-nm Process Node to Deliver the World’s Most Advanced Custom Logic Devices Introduction Altera’s launch of the Stratix IV and HardCopy® IV device families in the second quarter of 2008 marked the introduction of the world’s first 40-nm FPGAs and the industry’s only risk-free path to 40-nm ASICs. For Altera, the


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    40-nmtsmc fusetsmc 40nmtsmc 90nm sram+765nm sramtsmc 40nm layout issuetsmc 40nm sram32nm tsmctsmc 130nm metal processsony germanium transistorgermanium power devices corporation PDF

    Broadcom product roadmap

    Abstract: 65-nm 65nm sources tsmc 130nm metal process 2015 static ram BROADCOM "heat sink" Qualcomm "power management" 2010 WP-01002-1 65nm
    Contextual Info: White Paper Altera’s Strategy for Delivering the Benefits of the 65-nm Semiconductor Process Introduction Altera's strategy for delivering the benefits of the 65-nm semiconductor manufacturing process focuses on leveraging advanced technologies and methods to provide the most capable and highest performance devices at the lowest cost,


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    65-nmbroadcom product roadmap65nm sourcestsmc 130nm metal process+52015 static rambroadcom "heat sinkqualcomm "power management" 2010wp-01002-165nm PDF

    M1T1HT25FL64

    Contextual Info: High Speed Flow-through 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1HT25FL64 • High Speed 1T-SRAM Standard Macro • 83 MHz operation • 1-Clock cycle time • Flow-through read access timing • Late write mode timing • 64-Bit wide data buses


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    16kx64m1t1ht25fl6464-bitcl025g PDF

    TSMC 0.25Um

    Abstract: M1T2HT25FL32 2mbit TSMC CL025G
    Contextual Info: High Speed Flow-through 2-Mbit 64Kx32 Standard 1T-SRAM Embedded Memory Macro M1T2HT25FL32 • High Speed 1T-SRAM Standard Macro • 83 MHz operation • 1-Clock cycle time • Flow-through read access timing • Late write mode timing • 32-Bit wide data buses


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    64kx32m1t2ht25fl3232-bitcl025g+3tsmc 0.25um2mbittsmc cl025g PDF

    TSMC 0.25Um

    Abstract: CL025G M1T2HT25FL64
    Contextual Info: High Speed Flow-through 2-Mbit 32Kx64 Standard 1T-SRAM Embedded Memory Macro M1T2HT25FL64 • High Speed 1T-SRAM Standard Macro • 83 MHz operation • 1-Clock cycle time • Flow-through read access timing • Late write mode timing • 64-Bit wide data buses


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    32kx64m1t2ht25fl6464-bitcl025g+1tsmc 0.25um PDF

    TSMC 0.25Um

    Abstract: MOSYS M1T1HT25PZ32 M1T1HT25PZ64
    Contextual Info: High Speed Pipelined 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1HT25PZ64 • High Speed 1T-SRAM Standard Macro • 166 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late-late write mode timing • 64-Bit wide data buses


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    16kx64m1t1ht25pz6464-bitcl025g+3tsmc 0.25ummosysm1t1ht25pz32 PDF

    M1T1HT25PZ32

    Abstract: M1T2HT25PZ32 sram embedded
    Contextual Info: High Speed Pipelined 2-Mbit 64Kx32 Standard 1T-SRAM Embedded Memory Macro M1T2HT25PZ32 • High Speed 1T-SRAM Standard Macro • 166 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late-late write mode timing • 32-Bit wide data buses


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    64kx32m1t2ht25pz3232-bitcl025g+2m1t1ht25pz32sram embedded PDF

    M1T1HT25FL32

    Abstract: CL025G
    Contextual Info: High Speed Flow-through 1-Mbit 32Kx32 Standard 1T-SRAM Embedded Memory Macro M1T1HT25FL32 • High Speed 1T-SRAM Standard Macro • 83 MHz operation • 1-Clock cycle time • Flow-through read access timing • Late write mode timing • 32-Bit wide data buses


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    32kx32m1t1ht25fl3232-bitcl025g PDF

    TSMC 0.25Um

    Abstract: M1T1HT25PZ32 32Kx32 Synchronous
    Contextual Info: High Speed Pipelined 1-Mbit 32Kx32 Standard 1T-SRAM Embedded Memory Macro M1T1HT25PZ32 • High Speed 1T-SRAM Standard Macro • 166 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late-late write mode timing • 32-Bit wide data buses


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    32kx32m1t1ht25pz3232-bitcl025g+2tsmc 0.25um32kx32 synchronous PDF

    TSMC 0.25Um

    Abstract: M1T2HT25PZ64 CL025G TSMC CL025G
    Contextual Info: High Speed Pipelined 1-Mbit 32Kx64 Standard 1T-SRAM Embedded Memory Macro M1T2HT25PZ64 • High Speed 1T-SRAM Standard Macro • 166 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late-late write mode timing • 64-Bit wide data buses


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    32kx64m1t2ht25pz6464-bitcl025g+2tsmc 0.25umtsmc cl025g PDF

    CL018G

    Abstract: M1T1HT18FL64E MoSys MoSys sram embedded
    Contextual Info: High Speed Flow-through 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1HT18FL64E • High Speed 1T-SRAM Standard Macro • 100 MHz operation • 1-Clock cycle time • Flow-through read access timing • Late write mode timing • 64-Bit wide data buses


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    16kx64m1t1ht18fl64e64-bitcl018g+2mosysmosys sram embedded PDF

    CL018G

    Abstract: M1T2HT18FL32E "1t-sram"
    Contextual Info: High Speed Flow-through 2-Mbit 64Kx32 Standard 1T-SRAM Embedded Memory Macro M1T2HT18FL32E • High Speed 1T-SRAM Standard Macro • 100 MHz operation • 1-Clock cycle time • Flow-through read access timing • Late write mode timing • 32-Bit wide data buses


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    64kx32m1t2ht18fl32e32-bitcl018g+32300um32kx641t-sram PDF

    CL018G

    Abstract: M1T2HT18PE64E TSMC 0.18um tsmc sram CL018 TSMC 0.18um Process parameters
    Contextual Info: High Speed Pipelined 2-Mbit 32Kx64 Standard 1T-SRAM Embedded Memory Macro M1T2HT18PE64E • High Performance 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Early write mode timing • 64-Bit wide data buses


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    32kx64m1t2ht18pe64e64-bitcl018g+53200umtsmc 0.18umtsmc sramcl018tsmc 0.18um process parameters PDF

    CL018G

    Abstract: M1T1HT18PL64E 16Kx64 M1T1HT18PL32E fast sram 100mhz mosys sram embedded
    Contextual Info: High Speed Pipelined 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1HT18PL64E • High Performance 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late write mode timing • 64-Bit wide data buses


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    16kx64m1t1ht18pl64e64-bitcl018g+42200umm1t1ht18pl32efast sram 100mhzmosys sram embedded PDF

    CL018G

    Abstract: M1T1HT18PE64E Signal Technology 16Kx64
    Contextual Info: High Speed Pipelined 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1HT18PE64E • High Speed 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Early write mode timing • 64-Bit wide data buses


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    16kx64m1t1ht18pe64e64-bitcl018g+1signal technology PDF

    CL018G

    Abstract: 64Kx32 M1T2HT18PE32E TSMC 0.18um 1T-sram tsmc sram "1t-sram"
    Contextual Info: High Speed Pipelined 2-Mbit 64Kx32 Standard 1T-SRAM Embedded Memory Macro M1T2HT18PE32E • High Speed 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Early write mode timing • 32-Bit wide data buses


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    64kx32m1t2ht18pe32e32-bitcl018g+53200um2300umtsmc 0.18um1t-sramtsmc sram PDF

    CL018G

    Abstract: M1T2HT18PL64E mosys sram embedded sram embedded
    Contextual Info: High Speed Pipelined 2-Mbit 32Kx64 Standard 1T-SRAM Embedded Memory Macro M1T2HT18PL64E • High Performance 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late write mode timing • 64-Bit wide data buses


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    32kx64m1t2ht18pl64e64-bitcl018g+43200um2300ummosys sram embeddedsram embedded PDF

    CL018G

    Abstract: M1T1HT18PE32E Signal Technology fast sram 100mhz
    Contextual Info: High Speed Pipelined 1-Mbit 32Kx32 Standard 1T-SRAM Embedded Memory Macro M1T1HT18PE32E • High Speed 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Early write mode timing • 32-Bit wide data buses


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    32kx32m1t1ht18pe32e32-bitcl018g+2signal technologyfast sram 100mhz PDF

    CL018G

    Abstract: M1T2HT18PL32E TSMC 0.18um SRAM
    Contextual Info: High Speed Pipelined 2-Mbit 64Kx32 Standard 1T-SRAM Embedded Memory Macro M1T2HT18PL32E • High Performance 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late write mode timing • 32-Bit wide data buses


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    64kx32m1t2ht18pl32e32-bitcl018g+23200umtsmc 0.18um sram PDF

    CL018G

    Abstract: tsmc sram TSMC 0.18um SRAM TSMC 0.18um Process parameters M1T1HT18PL64E M1T1HT18PZ64E MoSys sram embedded MoSys 1T sram tsmc 0.18um
    Contextual Info: High Speed Pipelined 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1HT18PZ64E • High Performance 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late-late write mode timing • 64-Bit wide data buses


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    16kx64m1t1ht18pz64e64-bitcl018g+82200umtsmc sramtsmc 0.18um sramtsmc 0.18um process parametersm1t1ht18pl64emosys sram embeddedmosys 1t sramtsmc 0.18um PDF

    CL018G

    Abstract: M1T2HT18PL32E M1T2HT18PZ32E TSMC 0.18um
    Contextual Info: High Speed Pipelined 2-Mbit 64Kx32 Standard 1T-SRAM Embedded Memory Macro M1T2HT18PZ32E • High Performance 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late-late write mode timing • 32-Bit wide data buses


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    64kx32m1t2ht18pz32e32-bitcl018g+2m1t2ht18pl32etsmc 0.18um PDF

    tsmc 0.18um

    Abstract: SRAM timing CL018G M1T2HT18PL64E M1T2HT18PZ64E MoSys 1T sram mosys sram embedded
    Contextual Info: High Speed Pipelined 2-Mbit 32Kx64 Standard 1T-SRAM Embedded Memory Macro M1T2HT18PZ64E • High Performance 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late-late write mode timing • 64-Bit wide data buses


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    32kx64m1t2ht18pz64e64-bitcl018g+62300umtsmc 0.18umsram timingm1t2ht18pl64emosys 1t srammosys sram embedded PDF

    TSMC 0.18um

    Abstract: CL018G M1T1HT18PL32E M1T1HT18PZ32E
    Contextual Info: High Speed Pipelined 1-Mbit 32Kx32 Standard 1T-SRAM Embedded Memory Macro M1T1HT18PZ32E • High Performance 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late-late write mode timing • 32-Bit wide data buses


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    32kx32m1t1ht18pz32e32-bitcl018g+32200umtsmc 0.18umm1t1ht18pl32e PDF