TS-42 RESET Search Results

Contextual Info: 42 PM PM2329 ClassiPI Network Classification Processor Datasheet te ep nd ay ,1 6S ClassiPI m be r, 20 07 10 :0 3: PM2329 Datasheet Proprietary and Confidential HS Pa r ts Ma na g em en tI nc .o fI HS IN C on Su Network Classification Processor by I Copyright 2005 PMC-SIerra, Inc. All rights reserved

CXD2311AR

Contextual Info: CXD2311AR 1/2 IL22 * C-MOS 10-BIT 20MSPS VIDEO A/D CONVERTER 25 40 PIN I/O NO. 1 2 3 4 5 6 7 8 9 10 11 12 SIGNAL O O O O O — — O O O O O INPUT CAL CE CLK LINV MINV OE RESET SEL TESTMODE TIN TS TSTR V IN VRB VRT D0 D1 D2 D3 D4 DGND DVDD D5 D6

DF184S

Abstract: DF128S SDF DF141S DF170S tf 216 10a 250v DF240S E117626 DF141S DF66S DF216S
Contextual Info: SDF Thermal Cut-Offs SDF Our Thermal Cut-Offs Organic Thermal Element Type are used to prevent fires caused by abnormal heat generation from circuits and other heat producing electrical products. They are a non-resettable thermal fuse which open electrical contacts

Contextual Info: LS TTL DN74LS Series DN74LS192 D N 7 4 L S 1 9 2 Synchronous BCD U p/D ow n Dual Clock Counters with Reset • Description DN74LS192 is a synchronous decade up/down counter with direct-coupled reset input and set input. P -2 ■ Features • • • •

HD74LS90

Contextual Info: •D ecade Counters The H D 74LS90 contains four master-slave flip-flops and addi­ IBLOCK DIAGRAM tional gating to provide a divide-by-two counter and threestage binary counter for divide-by-five. This device has a gated zero reset and also has gated set-to-nine inputs for use in BCD

54LS279

Contextual Info: M Military 54LS279 M O T O R O L A Quad Set-Reset Latch M P O mini ELE CTRICALLY TESTED PER: M IL-M -38510/31602 L O G IC D IA G R A M V cc S4 R4 04 S2 A V A IL A B L E A S : S1 R3 03 R R N R R R N R 1) J A N : J M 3 8 5 1 0/3 1 6 0 2 B X A 2) S M D : 7601801

Contextual Info: 74HC/HCT40105 MSI 4 -B IT X 16-W O RD F IF O R EG IS TE R FEATURES • T Y P IC A L U N IT C O N D IT IO N S PARAM ETER SYM BOL Ind ep en d en t asynchronous inputs and o u tp u ts HCT 16 37 15 35 ns ns 16 17 18 18 ns ns , I HC Reset ca p a b ility • Status indicators o n inputs and

Contextual Info: DN74LS93 LS TTL DN74LS Series DN74LS93 4 - bit Binary Counters H D escription P-1 DN74LS93 is an asynchronous 4-bit binary hexadecim al co u n ter w ith direct-coupled reset input. • • • • • Features Direct-coupled reset input Capability fo r independent use as binary and octal

BCD FREQUENCY METER

Abstract: DN74LS90 MA161
Contextual Info: DN74LS90 LS TTL DN74LS Series DN74LS90 Decade Counters P-1 • Description DN 74LS90 is an asynchronous decade counter w ith directcoupled reset in put and nine direct-coupled set input term i­ nals. ■ Features • • • Direct-coupled reset input Nine direct-coupled set inputs

DN74LS197

Abstract: MA161
Contextual Info: LS TTL DN74LS Series D N 7 4 L S 1 9 7 k DN74J.S197 > 74-L £ì^ 7 30M H z Settab le Binary Counters / L atches • Description P-1 D N 74LS197 is an asynchronous hexadecim al 4-bit binary cou n ter w ith direct-coupled reset in p u t and set input. H Features

AD5110

Abstract: rheostat speed control circuit cs7u AD5116 CP-8-1
Contextual Info: Single-Channel, 128-/64-/32-Position, Up/Down, ±8% Resistor Tolerance, Nonvolatile Digital Potentiometer Data Sheet AD5111/AD5113/AD5115 FEATURES FUNCTIONAL BLOCK DIAGRAM VDD AD5111/ AD5113/ AD5115 POWER-ON RESET A W CLK DATA EN CS EEPROM UP/DOWN CONTROL

T4 7y DIODE

Abstract: AD5110 AD5116 AD8652 AD5113BCPZ5-RL7
Contextual Info: Single-Channel, 128-/64-/32-Position, Up/Down, ±8% Resistor Tolerance, Nonvolatile Digital Potentiometer Data Sheet AD5111/AD5113/AD5115 FEATURES FUNCTIONAL BLOCK DIAGRAM VDD AD5111/ AD5113/ AD5115 POWER-ON RESET A W CLK DATA EN CS EEPROM UP/DOWN CONTROL

Contextual Info: SN74ACT2158, SN74ACT2159 8K x 9 CACHE ADDRESS COMPARATORS/DATA RAMs D 3 2 8 1 , M A Y 1 9 9 0 R E V IS E D J U N E 1990 Fast Address to MATCH Delay 22 ns Max FN PACKAGE TOP VIEW 8K x 10 Internal Static RAM ISCI 5 Ä • Word Reset Function for Single Entry

SILEGO

Abstract: Silego Technology 48TVSOP SLGSSTVF16857L PC3200 SLGSSTVF16857 48-TVSOP
Contextual Info: SLGSSTVF16857 DDR 14-Bit Registered Buffer Features: • Differential Clock inputs • SSTL_2 data input signaling • Supports SSTL_2 class I output specifications • Output circuitry minimizes effects of SSO and unterminated lines • LVCMOS input levels on RESET pin

6413A

Abstract: scrambling code uplink Scrambling code Racal Instruments node b 6413A Infinite Power Solutions TAG 8706 3/TDA+9650
Contextual Info: Commercial in Confidence Testing UMTS Node B’s using the Racal Instruments Wireless Solutions 6413A. Number: AN05/0006 Product: 6413A Issued: 13 April 2005 Version: 1.2 Distribution: All Summary This application note is intended to be a guide to testing a UMTS Node B using 6413A.

AD5110BCPZ10-1-RL7

Abstract: CP-8-10 AD5116 AD5110 AD511X EVAL-AD5110SDZ
Contextual Info: Single-Channel, 128-/64-/32-Position, I2C, ±8% Resistor Tolerance, Nonvolatile Digital Potentiometer Data Sheet AD5110/AD5112/AD5114 FEATURES FUNCTIONAL BLOCK DIAGRAM VLOGIC VDD AD5110/AD5112/AD5114 POWER-ON RESET A W DATA SDA SCL EEPROM I2C SERIAL INTERFACE

LND-X-152

Abstract: LAMBDA LND-W-152 lambda LNS-Z-5 LND-P-152 LND-W-152 SPRAGUE 602D Lambda power supply LND-P-152 LNS-p-24 Lambda LNs-x LNS-Y-5
Contextual Info: 5 YEAR GUARANTEED LINEAR Lambda LN series Features—LN series Low-cost 5-year guaranteed power supplies MIL-R-26 type wire-wound resistors 5 package sizes up to 48 V up to 22 amps MIL-W-16878 Wire UL approved Convection Cooled Thermostat— automatically resets when overtemperature

Contextual Info: TL16C550B ASYNCHRONOUS COMMUNICATIONS ELEMENT SLLS136A - JANUARY 1994 - REVISED MARCH 1996 • Capable of Running With All Existing TL16C450 Software • After Reset, All Registers Are Identical to the TL16C450 Register Set • In the FIFO Mode, Transmitter and Receiver

SN74ACT7804

Abstract: SN74ACT7806 SN74ACT7814 fr0171
Contextual Info: SN74ACT7806 256 x 18 FIRST-IN, FIRST-OUT MEMORY SCAS436-APRIL 1992 DL PACKAGE TOP VIEW Member of the Texas Instruments W idebus Family Load Clock and Unload Clock Can Be Asynchronous or Coincident u RESET 1 D 17 2 55 ] Q 1 7 256 Words by 18 Bits D 16

Contextual Info: 74HC/HCT93 MSI 4-BIT B IN A R Y RIPPLE CO UN TER FEATURES T Y P IC A L SYMBOL • Various counting modes • Asyn chronous master reset • O u tp u t capability: standard • Iq C c a te g o ry : M S I G E N E R A L D E S C R IP T IO N Th e 7 4 H C / H C T 9 3 are high-speed

cyrix DX2

Abstract: Cx486DX2-66 CX486DX CX486DX2-v66 Cyrix 486dx Cyrix Cx486DX cx486dx2 486dx2 CX486 486DX
Contextual Info: C x486D X /D X 2 3 and 5 VOLT CPUs 486DX and 486DX2 Style CPUs with 8K Write-Back Cache, On-Chip FPU, Advanced Power Management, and 3.3 Volt Technology Cyrix / Electrical Specifications 4 .0 ELECTRICAL SPECIFICATIONS Electrical specifications in this chapter are valid

SN74ACT7804

Abstract: SN74ACT7806 SN74ACT7814 LG5C 20G22
Contextual Info: SN74ACT7804 512 x 18 FIRST-IN, FIRST-OUT MEMORY SCAS204 -A P R IL 1992 DL PACKAGE TOP VIEW • Member of the Texas Instruments Widebus ,M Family • Load Clock and Unload Clock Can Be Asynchronous or Coincident RESET[ 1 D17 [ 2 • 512 Words by 18 Bits u

B28D

Abstract: B29B B34 motorola PA13 PB30 B22c B31C nt226 UPM10 Nippon capacitors
Contextual Info: Order this document by MPC823EELE/D Rev 0 MPC823e AC Electrical Specifications This document contains detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications for the MPC823e. Note: Visit our website at www.motorola.com if you are using a frequency other than

96LS02PC

Abstract: 96S02PC 96LS02DC 96S02DC 96S02 96LS02 96LS02DM 96LS02FC 96S02DM 96S02FC
Contextual Info: 96S02 • 96LS02 96S02 0 / 0 96LS02 f // C O N N E C T IO N D IA G R A M P IN O U T A ¿? k'~ r 9 C xi DUAL RETRIGGERABLE RESETTABLE M O N O STABLE M ULTIVIBRATO R — (T TbI V c c Rxi [ | Ü J cxî CD 1 Q [ D E S C R IP T IO N — T h e 96S02 and 96LS02 are d ual re trig g e ra b le and re se t­