SY100EL38ZCTR Search Results

Contextual Info: * Clockworks SY10EL38/L SY100EL38/L 5V/3.3V h-2, -h4/6 CLO CK GENERATIO N CHIP SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES • 3.3V and 5V power supply options ■ 50ps output-to-output skew ■ Synchronous enable/disable ■ Master Reset for synchronization

Contextual Info: * Clockworks SY10EL38/L SY100EL38/L 5V/3.3V ^2, ^4/6 CLOCK GENERATION CHIP SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 3.3V and 5V power supply options 50ps output-to-output skew Synchronous enable/disable Master Reset for synchronization Internal 75K fì input pull-down resistors

Contextual Info: ClockWorks SY10EL38/L SY100EL38/L FINAL 5V/3.3V ÷2, ÷4/6 CLOCK GENERATION CHIP DESCRIPTION FEATURES • ■ ■ ■ ■ The SY10/100EL38/L are low skew ÷2, ÷4/6 clock generation chips designed explicitly for low skew clock generation applications. The internal dividers are

IRT 1250

Contextual Info: * 5V /3 .3 V -^2, +4/6 C L O C K SYNERGY G E N E R A T IO N C H IP S E M IC O N D U C T O R FEATURES • 50ps output-to-output skew ■ Synchronous enable/disable ■ Master Reset for synchronization ■ Internal 75Ki2 input pull-down resistors ■ ESD protection of 2000V

SC64046

Abstract: SC64046FN SC64046FNG SB99026MNG sb99026mn ECLTSSOP20EVB MC10EL58D NB3N3011 SB99026MNR2G SC64029FN
Contextual Info: 1 EO1_LISTED_PART_ID MC100ELT20D MC100ELT20DG MC100ELT20DR2 MC100ELT20DR2G MC100ELT20DTG MC100ELT20DTR2 MC100ELT20DTR2G MC100ELT21D MC100ELT21DG MC100ELT21DR2 MC100ELT21DR2G MC100ELT21DTG MC100ELT21DTR2 MC100ELT21DTR2G MC100ELT22D MC100ELT22DG MC100ELT22DR2

Contextual Info: 5V/3.3V -f-2, -f4/6 CLOCK GENERATION CHIP SYNERGY C s y i o e l m /l SY100EL38/L SEMICONDUCTOR FEATURES DESCRIPTION 3.3V and 5V power supply options 50ps output-to-output skew Synchronous enable/disable Master Reset for synchronization Internal 75K£2 input pull-down resistors

Contextual Info: * Clockworks SY10EL38/L SY100EL38/L 5V/3.3V ^2, ^4/6 CLOCK GENERATION CHIP SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 3.3V and 5V power supply options 50ps output-to-output skew Synchronous enable/disable Master Reset for synchronization Internal 75K fì input pull-down resistors

Contextual Info: 5V/3.3V ÷2, ÷4/6 CLOCK GENERATION CHIP DESCRIPTION FEATURES • ■ ■ ■ ■ The SY10/100EL38/L are low skew ÷2, ÷4/6 clock generation chips designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output