TRPN Search Results

laptop motherboard chip level crb

Abstract: CL-GD5320 LAPTOP Motherboard CHIP LEVEL book GD610 CL-GD610 gd5320 GD6340 gd510 CL-GD6410 cirrus logic gd610
Contextual Info: CL-GD6420 Data Book FEATURES • Single-chip VGA controller ■ Pin-compatible with the CL-GD6410 in 2-DRAM applications High-Resolution LCD VGA Controller for Notebook Computers ■ Up to 1 Mbyte 2, 4, or 8 256K x 4 DRAM Video Memory ■ Extended resolution up to 1024 x 768 with 256 colors on

Contextual Info: •HYUNDAI SEMICONDUCTOR H Y M 5 8 1 O O O A S e rie s 1M x 8-bit CMOS DRAM MODULE DESCRIPTION The HYM581000A is a 1M x 8-bit Fast page mode CMOS DRAM module consisting of two HY514400 in 20/26 pin SOJ on a 30 pin glass-epoxy printed circuit board. 0.2^uF decoupling capacitor Is mounted for each DRAM.

ras 0610 relay

Abstract: relay sm1 SH7712 RBL 43 P 530 SE SH7710 S273S
Contextual Info: User's Manual 32 The revision list summarizes the locations of revisions and additions. Details should always be checked by referring to the relevant text. SH7710, SH7712, SH7713 Group User’s Manual: Hardware Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

TL 104 Z

Abstract: HSP50415 01650-B3E03 HC244 IEEE1284 RAPC712
Contextual Info: ZONE H S P 5 0 4 1 5 E U R L 1 PAG E PPlGE l: 2: R E U I S I O N S DESCRIPTION LTR DATE APPR. S C H E M f ì T I C S T IT L E HSP50415 PPlGE 3: CPLD PPlGE 4: POWER / SRPlM / M IS C DRAWN BY: STEYE HARRELL RELEASED BY: DATE: 11/22/99 TITLE: - UPDATED BY: intefsil

Contextual Info: HV610 32-Channel Serial to Parallel Converter With High Voltage Push-Pull Outputs Features General Description ► ► ► ► ► ► The HV610 is a 32-channel high voltage, medium current driver IC. The outputs can be either at VPPS, VNN, HiZ, or HVGND.

S1221 AMCC

Abstract: Amcc S1221 ocp sfp SCP6802 SCP6802-GL TRPN03 HFBR-5908E S1201 S1202 S1204
Contextual Info: PRODUC T BRIEF S122 1 S1221 OC-3/12 SONET/SDH 8-bit Quad Transceiver Features Description • CMOS 0.13 micron technology • Complies with Bellcore and ITU-T specifications for jitter tolerance, jitter transfer, and jitter generation • On-chip high-frequency PLLs for clock generation and clock recovery

Contextual Info: H Y 5 1 V 16 4 1 O A S e r ie s “HYUNDAI 4M X 4-bit CMOS DRAM with WPB PRELIMINARY DESCRIPTION The HY51V16410A is the new generation and fast dynamic RAM organized 4,194,304 x 4-bit. The HY51V16410A utilizes Hyundai’s CMOS silicon gate process technology as well as advanced circuit techniques to provide wide

Contextual Info: HY5PS1G431 L F HY5PS1G831(L)F 1Gb DDR2 SDRAM HY5PS1G431(L)F HY5PS1G831(L)F This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied.

hy5ps1g431 2gb

Abstract: DDR2 Hynix 2Gb x 8 HY5PS121621 HY5PS12821 JESD51-2 HY5PS128 HY5PS1G831
Contextual Info: HY5PS1G431 L F HY5PS1G831(L)F 1Gb DDR2 SDRAM HY5PS1G431(L)F HY5PS1G831(L)F This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied.

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MCM81600 16M x 8 Bit Dynamic Random Access Memory Module The MCM81600 is a dynamic random access memory DRAM module organized as 16,777,216 x 8 bits. The module is a 30-lead single-in-line memory module (SIMM) consisting of eight MCM517400 DRAMs housed in 400 mil J-lead small out­

HY5PS1G831A

Contextual Info: HY5PS1G431A L FP HY5PS1G831A(L)FP HY5PS1G1631A(L)FP 1Gb DDR2 SDRAM HY5PS1G431A(L)FP HY5PS1G831A(L)FP HY5PS1G1631A(L)FP This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied.

Contextual Info: m a r r is S E M I C O N D U C T O R 2N7290D, 2N7290R 21^7290H REGISTRATION PENDING Currently Available as FRS440 D, R, H November 1994 R a d iatio n H ard en e d N -C h a n n e l P o w er M O S FE Ts Package Features • 5A, 500V, RDS(on) = 1,420ft TO-257AA

HY5PS12421FP

Abstract: HY5PS121621FP HY5PS12421FP-X HY5PS12821FP
Contextual Info: HY5PS12421FP HY5PS12821FP HY5PS121621FP 512Mb DDR2 SDRAM HY5PS12421FP HY5PS12821FP HY5PS121621FP This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied.

Contextual Info: H Y 5 1 V 1 6 1 O O A “H Y U N D A I S e r ie s 16MX 1-bit CMOS DRAM PRELIMINARY DESCRIPTION TTie HY51V16100A is the new generation and fast dynamic RAM organized 16,777,216x 1-bit. The HY51V16100A utilizes Hyundai's CMOS silicon gate process technology as well as advanced circuit techniques to provide wide

TIC147

Contextual Info: E1 Fx8 Device a n 8-Channel E1 Framer TXC-03109 X-S w i t c h DATA SHEET PRODUCT PREVIEW DESCRIPTION FEATURES Eight-channel offline framer supports standard and frame hold-off frame alignment with CRC-4 multiframe check, selectable out of frame criteria and change of frame

TC1766

Abstract: LMB 1028 cpu 414-4H apn 2054 MTI LTC 010 phase looked loop CERBERUS ocds Tricore TC1766 L-13 The 8002 Amplifier IC
Contextual Info: User’s Manual, V2.0, July 2007 TC1766 32-Bit Single-Chip Microcontroller Volume 1 of 2 : System Units Volume 2 (of 2): Peripheral Units Microcontrollers Edition 2007-07 Published by Infineon Technologies AG 81726 München, Germany Infineon Technologies AG 2007.

Contextual Info: ffPD421x900/L, 42S1X900/L x = 6, 7 2,097,152 X 9-Bit Dynamic CMOS RAM NEC NEC Electronics Inc. Description The devices listed below are fast-page dynamic RAMs organized as 2M words by 9 bits and designed to operate from a single power supply. Optional features

lmb 1021

Abstract: marking code INFINEON CERBERUS CNC DRIVES tb 1060 f022 INTF3000 L-12 L-13 MTI LTC 010 t-con lvds
Contextual Info: User’s Manual, V2.0, Aug. 2007 TC116x 32-Bit Single-Chip Microcontroller Volume 1 of 2 : System Units Volume 2 (of 2): Peripheral Units Microcontrollers Edition 2007-08 Published by Infineon Technologies AG 81726 München, Germany Infineon Technologies AG 2007.

Contextual Info: HV610 32-Channel Serial to Parallel Converter With High Voltage Push-Pull Outputs Features General Description ► ► ► ► ► ► The HV610 is a 32-channel high voltage, medium current driver IC. The outputs can be either at VPPS, VNN, HiZ, or HVGND.

Contextual Info: HY5PS1G431 L F HY5PS1G831(L)F 1Gb DDR2 SDRAM HY5PS1G431(L)F HY5PS1G831(L)F This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied.

MB8265A-15

Abstract: MB8265A-10
Contextual Info: FUJITSU M ICROELECTRONICS. INC. f t M3NMOS 65,536-BIT DYNAMIC RANDOM ACCESS MEMORY MB8265A-10 MB8265A-12 MB8265A-15 DESCRIPTION The Fujitsu MB8265A is a fully decoded, dynamic NMOS random access memory organized as 65536 one-bit words. The de­ sign is optimized for high-speed, high per­

AMCC DATE CODE MARKING

Abstract: amcc part marking DS2018 S1220PBIC S1220 SCP68 VDDH25 s1220PB
Contextual Info: Part Number S1220 Revision 3.03 – May 25, 2007 S1220 Advance Data Sheet SONET/SDH/ATM Quad OC-3/12 with Clock Data Recovery CDR FEATURES • • • • • • • • • • • • • • APPLICATIONS CMOS 0.13 micron technology Complies with Bellcore and ITU-T specifications for jitter tolerance, jitter transfer, and jitter

ocp sfp

Abstract: SFP LVDS S1217 AMCC S1204 amcc SCP6* SFP S1217
Contextual Info: PRODUC T BRIEF S121 7 S1217 OC-3/12 SONET/SDH 8-bit Transceiver Features Description AMCC Suggested Interface Devices • CMOS 0.13 micron technology • Complies with Bellcore and ITU-T specifications for jitter tolerance, jitter transfer, and jitter generation

TCA 720

Contextual Info: * GMM7321000CS/SG-60/70/80 LG Semicon Co.,Ltd. Description 1,048,576 W ORDS x 32 BIT CMOS DYNAMIC RAM MODULI- Features The GM M 7321000CS/SG is an 1M x 32 bits Dynamic RAM MODULIwhich is assembled 8 pieces of 1M x 4bit DRAMs in 20/26 pm SOJ package on single sides the