TRC 4800 Search Results

dry contact relay 220V

Abstract: trip coil TRC 4800 RK279 protective relay RXZ21 AUXILIARY CONTACT RELAY
Contextual Info: A C ET A INFORMATION Into-No. RK 279-300 E Froinrt?sli Reg. E'FR, September 1977 Edition 2 Relay Division Page 5634 1 File RK 00-90 Section 2 Supervision relay' i-ype TRC 4800 Type TRC 4800 supervises continuously the trip circuits of a circuit breaker and will give alarm fori

ABB CIRCUIT BREAKER

Abstract: B03-9175E B03-8360E trc 4800 4800 application circuit abb 220V DC relay abb 40 relay trip coil 220v ac circuit breaker BROWN BOVERI max current relay
Contextual Info: V Ék II 91 /M l» Type TRC 4800 B03-8360E Trip-circuit monitoring relay Page 1 October 1986 Changed since January 1985 Data subject to change without notic ASEA BROWN BOVERI ABB Relays Abstract *s Monitors auxiliary operate contacts Monitors the whole trip-circuit indepen­

Contextual Info: GM71C S 4800C GM71CS4800CL LG Semicon Co.,Ltd. 524.288W O R D S x 8 B IT C M O S D Y N A M IC R A M Description Features T he G M 71C (S )4800C /C L is the new generation dynam ic RAM o rganized 524,288 x 8 bit. G M 71C (S )4800C /C L has realized h igher density,

HM51

Abstract: HM514800CJI-7 HM514800CJI-8 HM514800CLJI-7 HM514800CLJI-8 HM51S4800CJI-7
Contextual Info: HM514800CI Series HM51S4800CI Series 524,288-word x 8-bit Dynamic Random Access Memory ADE-203-619A Z Rev. 1.0 Jul. 18, 1996 Description The Hitachi HM51(S)4800CI Series are CMOS dynamic RAM organized as 524,288-word × 8-bit. HM51(S)4800CI have realized higher density, higher performance and various functions by employing 0.8

HM514800CLZ7

Abstract: 4800a HM514800CJ-8 HM51 HM514800AJ-7 HM514800AJ-8 hm514800alj7 HM514800CLZ-6 Hitachi DSA00182 HM514800CLZ-7
Contextual Info: HM51 S 4800A/AL Series HM51(S)4800C/CL Series 524,288-word x 8-bit Dynamic Random Access Memory The Hitachi HM514800A/AL, HM514800C/CL are CMOS dynamic RAM organized as 524,288word x 8-bit. HM514800A/AL, HM514800C/CL have realized higher density, higher performance

Contextual Info: HM514800CI Series HM51S4800CI Series 524,288-word x 8-bit Dynamic Random Access Memory HITACHI ADE-203-619A Z Rev. 1.0 Jul. 18, 1996 Description The H itachi H M 51(S)4800C I Series are CMOS dynam ic RAM organized as 524,288-word x 8-bit. HM 51(S)4800CI have realized higher density, higher performance and various functions by employing 0.8

S4800L

Abstract: nec 424800 zx3A PD42S4800 tda 1006 D424800
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT //PD42S4800, 424800 4 M-BIT DYNAMIC RAM 512 K-WORD BY 8-BIT, FAST PAGE MODE Description The iiP042S 4800, 424800 are 524,288 words by 8 bits CMOS dynamic RAM s. The fast page mode capability realize high speed access and low power consumption.

Contextual Info: HM514800C Series HM51S4800C Series 524,288-word x 8-bit Dynamic Random Access Memory HITACHI Description The Hitachi HM51 S 4800C are CMOS dynamic RAM organized as 524,288-word x 8-bit. HM51(S)4800C have realized higher density, higher performance and various functions by employing 0.8 (am CMOS process

HM514800CLJ8

Contextual Info: HM514800C Series HM51S4800C Series 524,288-word x 8-bit Dynamic Random Access Memory HITACHI Description The Hitachi HM51 S 4800C are CMOS dynamic RAM organized as 524,288-word x 8-bit. HM51(S)4800C have realized higher density, higher performance and various functions by employing 0.8 (Am CMOS process

Contextual Info: H M 5 1 W 4 8 0 0 A /A L Preliminary S e r ie s 52 4,28 8-w o rd X 8-b it D y n a m ic R and o m A c ce ss M em ory T he H ita c h i H M 5 1 W 4 8 0 0 A /A L a re C M O S dynamic RAM organized as 524,288-word x 8-bit. HM 51W 4800A/AL have realized higher density,

E24526

Abstract: IBM11M4730C4M
Contextual Info: IBM11M4730C4M x 72 E12/10, 5.0V, Au. IBM13N8739CC 8M x 72 2 Bank Unbuffered SDRAM Module Features • 168-Pin Unbuffered 8-Byte Dual In-Line Memory Module • 8Mx72 Synchronous DRAM DIMM • Performance: fCK CAS Latency Clock Frequency 10 Units 3 100 MHz tCK

GM71C4800CJ-60

Abstract: GM71C GM71C4800CJ-70 GM71C4800C 28SOJ CL-70 S4800 GM71C4800CJ60
Contextual Info: GM71C4800C GM71CS4800CL LG Semicon Co.,Ltd. 524,288WORDS x 8 BIT CMOS DYNAMIC RAM Description Features The GM71C4800C/CL is the new generation dynamic RAM organized 524,288 x 8 bit. GM71C4800C/CL has realized higher density, higher performance and various functions by utilizing

DDR200

Abstract: DDR266 DDR333 DDR400 W3EG64128S-D3
Contextual Info: W3EG64128S-D3 -JD3 White Electronic Designs ADVANCED* 1GB – 2x64Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION Double-data-rate architecture The W3EG64128S is a 2x64Mx64 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM component. The module consists of sixteen 64Mx8 DDR

Contextual Info: W3EG64128S-D3 -JD3 White Electronic Designs ADVANCED* 1GB – 2x64Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION Double-data-rate architecture The W3EG64128S is a 2x64Mx64 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM component. The module consists of sixteen 64Mx8 DDR

Contextual Info: W3EG64128S-D3 -JD3 White Electronic Designs ADVANCED* 1GB – 2x64Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION Double-data-rate architecture The W3EG64128S is a 2x64Mx64 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM component. The module consists of sixteen 64Mx8 DDR

Contextual Info: White Electronic Designs W3EG64128S-D3 ADVANCED* 1GB – 2x64Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION Double-data-rate architecture The W3EG64128S is a 2x64Mx64 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM component. The module consists of sixteen 64Mx8 DDR

Contextual Info: White Electronic Designs W3EG64128S-D3 ADVANCED* 1GB-2x64Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION Double-data-rate architecture The W3EG64128S is a 2x64Mx64 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM component. The module consists of sixteen 64Mx8 DDR

Contextual Info: W3EG64128S-D3 -JD3 White Electronic Designs ADVANCED* 1GB – 2x64Mx64 DDR SDRAM UNBUFFERED FEATURES DESCRIPTION Double-data-rate architecture The W3EG64128S is a 2x64Mx64 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM component. The module consists of sixteen 64Mx8 DDR

Contextual Info: IBM13N2649JC IBM13N2739JC 2M x 64/72 1 B ank U nbuffered S D R A M M odule Features 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module 2Mx64/72 Synchronous DRAM DIMM Performance: 10 CAS Latency Units 3 jf c K I Clock j t CK Clock Cycle Frequency

Contextual Info: HM514800D Series HM51S4800D Series 524,288-word x 8-bit Dynamic RAM HITACHI ADE-203-687 Z Preliminaiy Rev. 0.0 Dec. 3, 1996 Description The Hitachi HM51(S)4800D are CMOS dynamic RAM organized as 524,288-word x 8-bit. HM51(S)4800D have realized higher density, higher performance and various functions by employing 0.8

IC SRAM 64K X 4

Contextual Info: SHARR LH52255 64K x 4 CMOS Static RAM Data Sheet Features Functional Description The LH52255 is a high speed 262,144 bit static RAM organized as 64K x 4. A fast, efficient design is obtained with a CMOS periphery and a matrix constructed with polysilicon load memory

Contextual Info: GM71C4800C GM71CS4800CL LG S em icon Co.,Ltd. 524,288WORDS x 8 BIT CMOS DYNAMIC RAM Description Features The GM71C4800C/CL is the new generation dynamic RAM organized 524,288 x 8 bit. GM71C4800C/CL has realized higher density, higher performance and various functions by utilizing

64K X 4 SRAM

Contextual Info: LH52255 SHARR 64K x 4 CMOS Static RAM Data Sheet Features Functional Description The LH52255 is a high speed 262,144 bit static RAM organized as 64K x 4. A fast, efficient design is obtained with a CMOS periphery and a matrix constructed with polysilicon load memory

Contextual Info: 5 1 2K X 8 Integrated Device Technology, Inc. PRELIMINARY C M O S STATIC R A M M O D U LE nJEZSJoS FEATURES: DESCRIPTION: • High density 4 megabit 512K x 8 static RAM module • Equivalent to the JEDEC standard for future monolithic 512K x 8 static RAMs