TO10NS Search Results
TO10NS Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: CY14B104K, CY14B104M 4-Mbit 512 K x 8/256 K × 16 nvSRAM with Real Time Clock 4-Mbit (512 K × 8/256 K × 16) nvSRAM with Real Time Clock Features • 25 ns and 45 ns access times ■ Internally organized as 512 K × 8 (CY14B104K) or 256 K × 16 (CY14B104M) |
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CY14B104K, CY14B104M 44-pin 54-pin CY14B104K) CY14B104M) | |
Contextual Info: PRELIMINARY CY14B104K, CY14B104M 4 Mbit 512K x 8/256K x 16 nvSRAM with Real Time Clock Features • Watchdog timer ■ 20 ns, 25 ns, and 45 ns access times ■ Clock alarm with programmable interrupts ■ Internally organized as 512K x 8 (CY14B104K) or 256K x 16 |
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CY14B104K, CY14B104M 8/256K CY14B104K) CY14B104M) 54-pin | |
Contextual Info: PRELIMINARY CY14B104KA, CY14B104MA 4 Mbit 512K x 8/256K x 16 nvSRAM with Real-Time-Clock Features • Watchdog timer ■ 20 ns, 25 ns, and 45 ns access times ■ Clock alarm with programmable interrupts ■ Internally organized as 512K x 8 (CY14B104KA) or 256K x 16 |
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CY14B104KA, CY14B104MA 8/256K 54-pin CY14B104KA) CY14B104MA) | |
CY14E104NContextual Info: PRELIMINARY CY14E104L/CY14E104N 4 Mbit 512K x 8/256K x 16 nvSRAM Features Functional Description • 15 ns, 25 ns, and 45 ns access times ■ Internally organized as 512K x 8 (CY14E104L) or 256K x 16 (CY14E104N) ■ Hands off automatic STORE on power down with only a small |
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CY14E104L/CY14E104N 8/256K CY14E104L/CY14E104N CY14E104N | |
SRAM 54-PIN TSOPContextual Info: PRELIMINARY CY14B104L/CY14B104N 4-Mbit 512K x 8/256K x 16 nvSRAM Features Functional Description • 15 ns and 25 ns access times • Internally organized as 512K x 8 or 256K x 16 • Hands-off automatic STORE on power down with only a small capacitor • STORE to QuantumTrap nonvolatile elements is initiated |
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CY14B104L/CY14B104N 8/256K CY14B104L/CY14B104N to10ns to15ns SRAM 54-PIN TSOP | |
Contextual Info: CY14B104K, CY14B104M 4-Mbit 512 K x 8/256 K × 16 nvSRAM with Real Time Clock 4-Mbit (512 K × 8/256 K × 16) nvSRAM with Real Time Clock Features • Watchdog timer ■ 25 ns and 45 ns access times ■ Clock alarm with programmable interrupts ■ Internally organized as 512 K × 8 (CY14B104K) or 256 K × 16 |
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CY14B104K, CY14B104M CY14B104K) CY14B104M) 44-pin 54-pin | |
Contextual Info: PRELIMINARY CY14E104K/CY14E104M 4-Mbit 512K x 8 / 256K x 16 nvSRAM with Real-Time-Clock Features • 15 ns, 25 ns, and 45 ns access times ■ Internally organized as 512K x 8 (CY14E104K) or 256K x 16 (CY14E104M) ■ Hands off automatic STORE on power down with only a small |
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CY14E104K/CY14E104M CY14E104K) CY14E104M) | |
Contextual Info: CY14B104K, CY14B104M 4-Mbit 512 K x 8/256 K × 16 nvSRAM with Real Time Clock Features • Watchdog timer ■ 25 ns and 45 ns access times ■ Clock alarm with programmable interrupts ■ Internally organized as 512 K × 8 (CY14B104K) or 256 K × 16 (CY14B104M) |
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CY14B104K, CY14B104M CY14B104K) CY14B104M) 44-pin 54-pin | |
Contextual Info: CY14B104K, CY14B104M 4-Mbit 512 K x 8/256 K × 16 nvSRAM with Real Time Clock 4-Mbit (512 K × 8/256 K × 16) nvSRAM with Real Time Clock Features • 25 ns and 45 ns access times ■ Internally organized as 512 K × 8 (CY14B104K) or 256 K × 16 (CY14B104M) |
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CY14B104K, CY14B104M 44-pin 54-pin CY14B104K) CY14B104M) | |
TSOP II 54
Abstract: TSOP 48 thermal resistance junction to case TSOP 48 thermal resistance TSOP 54 thermal resistance
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CY14B104L, CY14B104N 8/256K CY14B104L/CY14B104N TSOP II 54 TSOP 48 thermal resistance junction to case TSOP 48 thermal resistance TSOP 54 thermal resistance | |
Contextual Info: CY14B104L, CY14B104N 4 Mbit 512K x 8/256K x 16 nvSRAM Features Functional Description • 20 ns, 25 ns, and 45 ns Access Times ■ Internally organized as 512K x 8 (CY14B104L) or 256K x 16 (CY14B104N) ■ Hands off Automatic STORE on power down with only a small |
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CY14B104L, CY14B104N 8/256K CY14B104L/CY14B104N | |
Contextual Info: CY14B104K, CY14B104M 4 Mbit 512K x 8/256K x 16 nvSRAM with Real Time Clock Features • 20 ns, 25 ns, and 45 ns access times ■ Internally organized as 512K x 8 (CY14B104K) or 256K x 16 (CY14B104M) ■ Hands off automatic STORE on power down with only a small |
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CY14B104K, CY14B104M 8/256K 54-pin CY14B104K) CY14B104M) | |
271024
Abstract: 82524
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CY14B104K, CY14B104M 8/256K CY14B104K) CY14B104M) 54-Pin 271024 82524 | |
271024Contextual Info: CY14B104K, CY14B104M 4 Mbit 512K x 8/256K x 16 nvSRAM with Real Time Clock Features • 25 ns and 45 ns Access Times ■ Internally Organized as 512K x 8 (CY14B104K) or 256K x 16 (CY14B104M) ■ Hands Off Automatic STORE on Power Down with only a Small Capacitor |
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CY14B104K, CY14B104M 8/256K 54-Pin 271024 | |
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Contextual Info: PRELIMINARY CY14B104L, CY14B104N 4-Mbit 512K x 8/256K x 16 nvSRAM Features Functional Description • 15 ns, 25 ns, and 45 ns access times ■ Internally organized as 512K x 8 (CY14B104L) or 256K x 16 (CY14B104N) ■ Hands off automatic STORE on power down with only a small |
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CY14B104L, CY14B104N 8/256K CY14B104L) CY14B104N) CY14B104L/CY14B104N | |
Contextual Info: CY14B104K, CY14B104M 4 Mbit 512K x 8/256K x 16 nvSRAM with Real Time Clock Features • 20 ns, 25 ns, and 45 ns access times ■ Internally organized as 512K x 8 (CY14B104K) or 256K x 16 (CY14B104M) ■ Hands off automatic STORE on power down with only a small |
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CY14B104K, CY14B104M 8/256K 54-pin CY14B104K) CY14B104M) | |
Contextual Info: PRELIMINARY CY14B104K/CY14B104M 4 Mbit 512K x 8/256K x 16 nvSRAM with Real-Time-Clock Features • 15 ns, 25 ns, and 45 ns access times ■ Internally organized as 512K x 8 (CY14B104K) or 256K x 16 (CY14B104M) ■ Hands off automatic STORE on power down with only a small |
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CY14B104K/CY14B104M 8/256K 44/54-pin CY14B104K) CY14B104M) | |
Contextual Info: PRELIMINARY CY14B104L, CY14B104N 4 Mbit 512K x 8/256K x 16 nvSRAM Features Functional Description • 15 ns, 25 ns, and 45 ns access times ■ Internally organized as 512K x 8 (CY14B104L) or 256K x 16 (CY14B104N) ■ Hands off automatic STORE on power down with only a small |
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CY14B104L, CY14B104N 8/256K CY14B104L/CY14B104N | |
TSOP 54 Package
Abstract: CY14B104L CY14B104N
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CY14B104L, CY14B104N 8/256K CY14B104L) CY14B104N) CY14B104L/CY14B104N TSOP 54 Package CY14B104L CY14B104N | |
Contextual Info: PRELIMINARY CY14E104L/CY14E104N 4-Mbit 512K x 8/256K x 16 nvSRAM Features Functional Description • 15 ns, 25 ns, and 45 ns access times ■ Internally organized as 512K x 8 (CY14E104L) or 256K x 16 (CY14E104N) ■ Hands off automatic STORE on power down with only a small |
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CY14E104L/CY14E104N 8/256K CY14E104L) CY14E104N) CY14E104L/CY14E104N | |
Contextual Info: CY14B104K, CY14B104M 4-Mbit 512 K x 8/256 K × 16 nvSRAM with Real Time Clock 4-Mbit (512 K × 8/256 K × 16) nvSRAM with Real Time Clock Features • 25 ns and 45 ns access times ■ Internally organized as 512 K × 8 (CY14B104K) or 256 K × 16 (CY14B104M) |
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CY14B104K, CY14B104M CY14B104K) CY14B104M) | |
CY14B104L
Abstract: CY14B104N
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CY14B104L, CY14B104N 8/256K CY14B104L) CY14B104N) CY14B104L/CY14B104N CY14B104L CY14B104N | |
TSOP 54 PIN
Abstract: TSOP 54 Package CY14B104L CY14B104N
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CY14B104L, CY14B104N 8/256K CY14B104L) CY14B104N) CY14B104L/CY14B104N TSOP 54 PIN TSOP 54 Package CY14B104L CY14B104N | |
TSOP 54 Package
Abstract: TSOP 48 thermal resistance TSOP 54 PIN TSOP 54 Package used in where TSOP II 54 TSOP II 54 Package
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CY14B104L/CY14B104N 8/256K CY14B104L/CY14B104N to10ns to15ns TSOP 54 Package TSOP 48 thermal resistance TSOP 54 PIN TSOP 54 Package used in where TSOP II 54 TSOP II 54 Package |