TCKMIN Search Results

E3235

Contextual Info: TOSHIBA TENTATIVE TC59WM815/07/03BFT-70,-75,-80 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4,194,304-WORDSX4BANKSX16-BITS SYNCHRONOUS DYNAMIC RAM 8,388,608-WORDSX4BANKSX8-BITS SYNCHRONOUS DYNAMIC RAM 16,777,216-WORDSX4BANKSX4-BITS SYNCHRONOUS DYNAMIC RAM

Contextual Info: M2S1G64CBH4B5P / M2S2G64CB88B5N / M2S4G64CB8HB5N 1GB: 128M x 64 / 2GB: 256M x 64 / 4GB: 512M x 64 PC3-8500 / PC3-10600 / PC3-12800 Unbuffered DDR3 SO-DIMM Based on DDR3-1066/1333/1600 128Mx16 1GB / 256Mx8 (2GB) / 256Mx8 (4GB) SDRAM B-Die Features •Performance:

DDR200

Abstract: DDR266A DDR266B IBMN612404GT3B IBMN612804GT3B IBMN62540 IBMN62580 128MB PC266
Contextual Info: IBMN612404GT3B IBMN612804GT3B 128Mb Double Data Rate Synchronous DRAM Preliminary Features CAS Latency and Frequency CAS Latency 2 2.5 Maximum Operating Frequency MHz * DDR266A (7N) DDR266B (75N) DDR200 (8N) 133 143 100 133 100 125 * Values are nominal (exact tCK should be used).

AN6019

Abstract: PAC10 1GM1
Contextual Info: ispPAC 10 Features Functional Block Diagram • IN-SYSTEM PROGRAMMABLE ISP ANALOG CIRCUIT — Four Instrument Amplifier Gain/Attenuation Stages — Signal Summation (Up to 4 Inputs) — Precision Active Filtering (10kHz to 100kHz) — No External Components Needed for Configuration

NT5TU128M8DE

Abstract: NT5TU64M16DG nt5tu64m16dg-Bd NT5TU128M8DE-BD NT5TU256M4DE nt5tu64m NT5TU64M16 NT5TU64M16DG-3C NT5TU64M16DG-3CI NT5TU64M16DG-BE
Contextual Info: NT5TU256M4DE / NT5TU128M8DE / NT5TU64M16DG NT5TB256M4DE / NT5TB128M8DE / NT5TB64M16DG 1Gb DDR2 SDRAM Feature CAS Latency Frequency -37B/-37BI -3C/-3CI -AD/-ADI -AC/-ACI/-ACL -BE -BD DDR2-533 DDR2-667 DDR2-800 DDR2-800 DDR2-1066 DDR2-1066 4-4-4 5-5-5 6-6-6

nt5tu128m8de-ac

Abstract: NT5TU64M16DG-AD NT5TU128M8DE-AD NT5TU256M4DE NT5TU128M8DE NT5TU64M16DG NT5TU64M16DG-3C Nanya NT5TU64M16DG
Contextual Info: NT5TU256M4DE / NT5TU128M8DE / NT5TU64M16DG 1Gb DDR2 SDRAM Preliminary Edition Features CAS Latency and Frequency Speed Sorts -37B DDR2 -533 -3C DDR2 -667 -AD DDR2 -800 -AC DDR2 -800 Units Bin CL-tRCD-TRP 4-4-4 5-5-5 6-6-6 5-5-5 tck max. Clock Frequency 266

NT1GC72B89A0NF

Abstract: 128MX8 nanya 2gb DDR3 DIMM NT2GC72B8PA0NF-CG ddr3 PCB footprint NT2GC72B8PA0NF Nanya DDR3 DDR3 DIMM footprint DDR3 udimm jedec PC3-10600
Contextual Info: NT1GC72B89A0NF / NT2GC72B8PA0NF NT1GC72B89A1NF / NT2GC72B8PA1NF 1GB: 128M x 72 / 2GB: 256M x 72 PC3-8500 / PC3-10600 Unbuffered DDR3 SDRAM DIMM with ECC Based on DDR3-1066/1333 128Mx8 SDRAM A-Die Features •Performance: Speed Sort DIMM CAS Latency fck – Clock Freqency

NT5TU32M16AG-37B

Abstract: NT5TU128M4AE nt5tu64m8 nt5tu64m NT5TU32M16 NT5T nt5tu32m16ag nt5tu64m8af
Contextual Info: NT5TU128M4AB/NT5TU128M4AE Green NT5TU64M8AF/NT5TU64M8AB/NT5TU64M8AE(Green) ) 512Mb DDR2 SDRAM Features • Write Latency = Read Latency -1 CAS Latency and Frequency • Programmable Burst Length: 4 and 8

AN6027

Abstract: AN6026 151m75
Contextual Info: In-System Programmable Analog Circuit October 2002 Data Sheet Features Functional Block Diagram • Flexible Interface and Programming Control • • • • Full configuration capability, SPI or JTAG modes Unlimited device updates using SRAM register E2CMOS for non-volatile configuration storage

NT5TU32M16CG-BD

Abstract: NT5TU32M16CG-be NT5TU64M8CE
Contextual Info: NT5TU128M4CE / NT5TU64M8CE /NT5TU32M16CG 512Mb DDR2 SDRAM C-Die Features • 1.8V ± 0.1V Power Supply Voltage • Data-Strobes: Bidirectional, Differential • Programmable CAS Latency: 3,4,5,6 and 7 • 4 internal memory banks • Programmable Additive Latency: 0, 1, 2, 3, and 4

16Mx8

Abstract: pc133 SDRAM DIMM W9D332647LA-333 079R 32X64 32X64 144 pin
Contextual Info: REVISIONS DATE REV I. DESCRIPTION: DESCRIPTION ZONE 6/29/01 LUISA T Ÿ W9D332647LA-333 is a 32Mx64 industry standard 168-pin PC-133 SDRAM DIMM Ÿ Manufactured with 16 16Mx8 400-mil TSOPII-54 PC-133 Synchronous DRAM devices of 12-row, 10-column, 4-bank addressing.

222k

Abstract: 079R PC-100 PC100-222 KO9018
Contextual Info: REVISION DATE REV DESCRPTION ZONE APPVD 6/26/01 III. TIMING I. DESCRIPTION: Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ W9Q316727KD-222K is a 16Mx72 industry standard 168-pin PC100-222 SDRAM ECC DIMM Manufactured with 18 NEC ELPIDA 8Mx8 400-mil TSOPII-54 100 MHz Synchronous DRAM devices of 12-row, 9-column, 4 -bank addresing.

DDR200

Abstract: DDR266A DDR266B IBMN62540 IBMN625404GT3B IBMN62580 IBMN625804GT3B
Contextual Info: IBMN625404GT3B IBMN625804GT3B 256Mb Double Data Rate Synchronous DRAM Preliminary Features CAS Latency and Frequency CAS Latency Maximum Operating Frequency MHz * DDR266A (7N) DDR266B (75N) DDR200 (8N) 133 143 100 133 100 125 2 2.5 * Values are nominal (exact tCK should be used).

Contextual Info: 240PIN DDR2 667 Fully Buffered DIMM 1GB With 64Mx8 CL5 TS128MFB72V6J-T Description MBIST and IBIST Test functions The TS128MFB72V6J-T is a 128M x 72bits DDR2-667 Hot add-on and Hot Remove Capability Fully Buffered DIMM. The TS128MFB72V6J-T consists of Transparent mode for DRAM test support

k4b2g1646q

Abstract: ddr3 2133 K4B2G1646Q-BCK0 K4B2G1646Q-BCMA
Contextual Info: Rev. 1.03, Mar. 2014 K4B2G1646Q 2Gb Q-die DDR3 SDRAM Only x16 96FBGA with Lead-Free & Halogen-Free RoHS compliant datasheet SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed

P83C524

Abstract: 80C51 P83C524FBA P83C524FBP P83C524FFA P83C524FFP P83C524FHP
Contextual Info: P H IL IP S I N T E R N A T I O N A L bSE J> □ 7 1 1 D Ö 2 b D D b l 3 4 3 544 H P H I N Philips Preliminary specification 8-bit microcontroller P83C524 CONTENTS 15 INSTRUCTION SET 1 FEATURES

Contextual Info: W94AD6KB / W94AD2KB 1Gb Mobile LPDDR Table of Contents1. 2. 3. 4. 5. 6. 7. 8. GENERAL DESCRIPTION . 4 FEATURES . 4

Contextual Info: Defense Grade Platform Flash In-System Programmable Configuration PROM DS541 v2.1 June 25, 2014 Product Specification Features • In-System Programmable PROM for Configuration of Xilinx FPGAs • I/O Pins Compatible with Voltage Levels Ranging From 1.8V to 3.3V

dax6

Abstract: Mobile SDRAM
Contextual Info: V55C1256164MG 256Mbit MOBILE SDRAM 1.8 VOLT, TSOP II / FBGA PACKAGE 16M X 16 75 9 10 System Frequency fCK 133 MHz 111 MHz 100MHz Clock Cycle Time (tCK3) 7.5ns 9.0 ns 10 ns Clock Access Time (tAC3) CAS Latency = 3 6.0 ns 7.0 ns 8.0ns • Available in 54-ball FBGA (with 9x6 ball array

NT5CB64M16AP-CF

Abstract: nt5cb64m16 NT5CB64M16AP-CG NT5CB64M16AP nanya NT5CB64M16AP NT5CB64m NT5CB64M16AP-BE nt5cb64m16ap-dh MPR 20 20 CF RESISTOR NT5CB64M16AP-AC
Contextual Info: 1Gb DDR3 SDRAM A-Die NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP Feature  Write Leveling  1.5V ± 0.075V JEDEC Standard Power Supply  OCD Calibration  8 Internal memory banks (BA0- BA2)  Dynamic ODT (Rtt_Nom & Rtt_WR)  Differential clock input (CK, )

NT5TU256T8DY

Abstract: 128 MB DDR2 SDRAM DDR2-667 DDR2-800 NT5TU256T8DY-3C
Contextual Info: NT5TU512T4DY / NT5TU256T8DY 2Gb DDR2 SDRAM DDP Features • Programmable Additive Latency: 0, 1, 2, 3 and 4 CAS Latency and Frequency Speed Sorts DDR2-667 DDR2-800 DDR2-800 (-3C) (-AC) (-AD) Bin • Write Latency = Read Latency -1 Units • Programmable Burst Length: 4 and 8

NT5TU64M16

Abstract: NT5TU128M8BJ-3C NT5TU64M16BM nt5tu64m NT5TU128M8 128 MB DDR2 SDRAM 1GB DDR2 4 banks NT5TU256M4BJ
Contextual Info: NT5TU256M4BJ / NT5TU128M8BJ / NT5TU64M16BM Green 1Gb DDR2 SDRAM Features CAS Latency and Frequency Speed Sorts -5A DDR2 -400 -37B DDR2 -533 -3C DDR2 -667 -25D DDR2 -800 Units Bin (CL-tRCD-TRP) 3-3-3 4-4-4 5-5-5 6-6-6 tck max. Clock Frequency 200 266 333 400

DS1032

Abstract: POWR604
Contextual Info: ispPAC -POWR604 Device Datasheet June 2010 All Devices Discontinued! Product Change Notification PCN #09-10 has been issued to discontinue all devices in this data sheet. The original datasheet pages have not been modified and do not reflect those changes.

VQFP44 package

Abstract: isp Cable Version 3.0 VQ44 XQR18V04 XQVR1000 XQVR300 XQVR600 fpga radiation XQR2V1000 XQR18V04VQ44N
Contextual Info: QPro XQR18V04 Radiation Hardened 4Mbit QML ISP Configuration Flash PROM R DS082 v1.4 December 15, 2003 5 Features • Description Operating Temperature Range: –55° C to +100° C MeV/cm2/mg • Latch-Up Immune to LET >120 • Guaranteed TID of 30 kRad(Si) per spec 1019.5