T44A Search Results

82378ib

Contextual Info: A P M Ä M ! DM iP© I^[ìfflA'irD@ N] in te i 82378IB SYSTEM I/O SIO Provides the Bridge Between the PCI Bus and ISA Bus Arbitration for PCI Devices — Four PCI Masters are Supported — Fixed, Rotating, or a Combination of the Two 100% PCI and ISA Compatible

T44A

Abstract: T44B AN2311 CS10 MSC8101 MSC8101ADS SC140
Contextual Info: Freescale Semiconductor Application Note AN2311 Rev. 1, 11/2005 Bootstrapping the MSC8101 Device Through the HDI16 Port By Joe Rebello The StarCore -based MSC8101 device incorporates a communications processor module CPM with high-speed serial communications interfaces and a system integration unit

386SX

Abstract: 82385SX t23b 82358 82385 t44a 387SX SA9C a82385 intel 386 SX LP
Contextual Info: in te i 82385SX HIGH PERFORMANCE CACHE CONTROLLER Im proves 386 SX System Perform ance — Reduces A verage CPU W ait States to Nearly Zero — Zero W ait State Read Hit — Zero W ait State Posted Mem ory W rites — Allows O ther Masters to Access the

VIA SL9011

Contextual Info: The FlexSet PC/AT System Controller SL9011 PRELIMINARY FEATURES • AT System Control Logic. • Supports 80286,80386SX P9 , or 80386DX-based Designs. • Up to 25 MHz Performance. • Clock Switching and Reset Logic. • Programmable Wait States for 8 Bit AT Cycles.

t2g memory

Abstract: 140U -i6
Contextual Info: AMDÌ1 PRELIMINARY Élan SC300 Highly Integrateci, Low -Power, 32-B it M icrocontroller DISTINCTIVE CHARACTERISTICS • Highly integrated, single-chip CPU and system logic - Optimized for embedded PC applications - Combines 32 bit, x86 compatible, low-voltage

Contextual Info: AMDÌ1 PRELIMINARY Élan SC300 Highly Integrated, Low-Power, 32-Bit Microcontroller DISTINCTIVE CHARACTERISTICS - Zero wait-state access with 70 ns, Page mode DRAMs • Highly integrated, single-chip CPU and system logic - Supports up to 16 Mbyte system memory

Contextual Info: Â IW M 1 in te i D M ]F © fô ü iM îrO R !] 82595 ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Optimal Integration for Lowest Cost Solution — Glueless 8-Bit/ 16-Bit ISA/PCMCIA 2.0 Bus Interface — Provides Fully 802.3 Compliant AUI and TPE Serial Interface

dma controller chip

Contextual Info: in tj, 82374EB EISA SYSTEM COMPONENT ESC • Integrates EISA Compatible Bus Controller — Translates Cycles between EISA and ISA Bus — Supports EISA Burst and Standard Cycles — Supports ISA No Wait State Cycles — Supports Byte Assembly/ Disassembly for 8-, 16- and 32-Bit

micrometals toroid core t30

Abstract: micrometals toroid core t300 micrometals toroid core t12 IC TL84 RF TOROIDS T44 UFH 073 T44A micrometals T37 T300D micrometals toroid core t68
Contextual Info: HOME TABLE OF CONTENTS Material Characteristics . 2 Design Aids . 3

450GX

Abstract: 450KX 4Mx4 dram simm w10 mc 60 82379AB 82454GX 82453GX 82450GX D26J "network interface cards"
Contextual Info: A Intel 450KX/GX PCIset The information in this document is subject to change. PRELIMINARY A Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by the sale of Intel products. Except as provided in

SC310-33

Contextual Info: AMDÌ1 PRELIMINARY Élan SC310 Single-Chip, 32-Bit, PC/AT Microcontroller DISTINCTIVE CHARACTERISTICS • Highly integrated, single-chip CPU and system logic - Optimized for embedded PC applications - Combines 32 bit, x86 compatible, low-voltage CPU with memory controller, PC/AT peripheral

82395DX

Abstract: 82395 80287 coprocessor architecture CA 5668 5665IN bem 69a ir 548h 82396sx
Contextual Info: in te i 82396SX SMART CACHE Optim ized ln te l 3 8 6 TM SX M icroprocessor Com panion Integrated 16 KB Data RAM 16-Byte Line Size 4 Way SET Associative w ith Pseudo LRU A lgorithm W rite B u ffe r A rch itectu re Dual Bus A rchitecture — Snooping M aintains Cache

T44A

Abstract: 80286 microprocessor pin out diagram sl9030 t53a 80387SX weitek ti6a 80387DX 80386 microprocessor pin out diagram via flexset
Contextual Info: The FlexSet PC/AT System Controller SL9011 PRELIMINARY FEATURES • AT System Control Logic. • Supports 80286, 80386SX P9 , or 80386DX-based Designs. • Up to 25 MHz Performance. • Clock Switching and Reset Logic. • Programmable Wait States for 8 Bit AT Cycles.

hst 1025 dr

Abstract: t41b mos 1NTC 82595T T45B S1115 IC 74ALS245 application
Contextual Info: in te i 82595TX ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Optimal Integration for Lowest Cost Solution — Glueless 8-Bit/16-Bit ISA/PCMCIA 2.0 Bus Interface — Provides Fully 802.3 Compliant AUI and TPE Serial Interface — Local DRAM Support up to

intel 80236

Abstract: T0A 2003 TL67 intel 82595 transformer tl35 Ab 323 isa pcmcia
Contextual Info: A P M & K K D i D M [F [^ [M Ä T D © M in te i 82595TX ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Optimal Integration fo r Lowest Cost Solution — Glueless 8-B it/16-B it ISA /PCM CIA 2.0 Bus Interface — Provides Fully 802.3 Com pliant A ll I

8042 keyboard controller

Abstract: T44C
Contextual Info: PRELIMINARY AMDÌ1 Élan SC310 Single-Chip, 32-Bit, PC/AT Microcontroller DISTINCTIVE CHARACTERISTICS • Highly integrated, single-chip CPU and system logic - Optimized for embedded PC applications - Combines 32 bit, x86 compatible, low-voltage CPU with memory controller, PC/AT peripheral

6-digit 7-segment

Abstract: hour meter PT1210G0 diode t56 7 segment 6 digit glass panel T44D65A T44E69A T44B6 T55B2A C1101A
Contextual Info: 1482-2012.qxp:QuarkCatalogTempNew 9/12/12 5:02 PM Page 1482 INTERCONNECT TEST & MEASUREMENT 16 Counters and Hour Meters Digital LCD Hour Meter LCD counter vesrions are also available. Ask your Allied sales associate. ᭤ 6-Digit, 7 mm LCD Display ᭤ CMOS EEPROM Non-Volatile Memory

Contextual Info: A G W A K I ! O K lF û i^ ff iifl T O © ^ in le l 82595TX ISA/PCMCIA HIGH INTEGRATION ETHERNET CONTROLLER Optimal Integration for Lowest Cost Solution — Glueless 8-Bit/ 16-Bit ISA/PCMCIA 2.0 Bus Interface — Provides Fully 802.3 Compliant AUI and TPE Serial Interface

82374EB/82374SB

Contextual Info: Ä I W Ä 1 OMIF ISBM!rD@M in tei 82374EB EISA SYSTEM COMPONENT ESC Integrates EISA Compatible Bus Controller — Translates Cycles between EISA and ISA Bus — Supports EISA Burst and Standard Cycles — Supports ISA No Wait State Cycles — Supports Byte Assembly/

A82385

Contextual Info: 82385 HIGH PERFORMANCE 32-BIT CACHE CONTROLLER • Improves 386 DX System Performance — Reduces Average CPU Wait States to Nearly Zero — Zero Wait State Read Hit — Zero Wait State Posted Memory Writes — Allows Other Masters to Access the System Bus More Readily

Contextual Info: intJ. 82374EB EISA SYSTEM COMPONENT ESC • Integrates EISA Compatible Bus Controller — Translates Cycles between EISA and ISA Bus — Supports EISA Burst and Standard Cycles — Supports ISA No Walt State Cycles — Supports Byte Assembly/ Disassembly for 8-, 16- and 32-Bit

82385

Abstract: a82385 intel 82385 82380 INTEGRATED SYSTEM PERIPHERAL 386DX T44A 82380 386DXsystem INTEL 386DX PQFP dimension intel
Contextual Info: in tei 82385 HIGH PERFORMANCE 32-BIT CACHE CONTROLLER Im proves 386 DX System Perform ance — Reduces A verage CPU W ait States to Nearly Zero — Zero W ait State Read Hit — Zero W ait State Posted M em ory Writes — Allows O ther Masters to Access the

MC50000IOAD8

Abstract: stepper motor id28 stepper Motor ID31 stepper motor id27 stepping motor id27 "Stepper Motors" ID27 7.3 t44a MC50000 MC50000IO unipolar STEPPER MOTOR translator with pic
Contextual Info: MagellanTM Motion Processor MC58000 Electrical Specifications for DC Brush, Brushless DC, Microstepping, and Pulse & Direction Motion Processors Performance Motion Devices, Inc. 55 Old Bedford Road Lincoln, MA 01773 Revision 2.0, December 2006 NOTICE This document contains proprietary and confidential information of Performance Motion Devices, Inc., and is protected by federal copyright law. The contents of this document may not be disclosed to third parties, translated, copied,

Intel 82311

Abstract: 386 MOTHERBOARD
Contextual Info: irrtJ. 82308 Micro Channel BUS CONTROLLER • Micro Channel Compatible Bus Control ■ Supports 8-, 16- or 32-Bit Data Transfers on the Micro Channel ■ Optional Hardware! Enforced I/O Recovery Mechanism ■ Cache Controller 82385 Interface to Maximize Performance for 80386 Based