T0G13 Search Results

Contextual Info: * 4-BIT PARALLEL-TOSERIAL CONVERTER SYNERGY SY10E446 SY100E446 SEMICONDUCTOR FEATURES DESCRIPTION O n -c h ip c lo c k -¡A an d -^8 E x te n d e d 100E V ee ra n g e o f - 4 .2 V to - 5 .5 V 1 .6 G b /s ty p ic a l d a ta rate c a p a b ility D iffe re n tia l c lo c k an d se ria l in puts

Contextual Info: +2 ,-4 /6 CLOCK SYNERGY Clockworks SY10EL38L SY100EL38L GENERATION CHIP SEMICONDUCTOR FEATURES DESCRIPTION 3.3V power supply 50ps output-to-output skew Synchronous enable/disable Master Reset for synchronization Internal 75Ki2 input pull-down resistors

Contextual Info: Clockworks SY10EL11/L SY100EL11/L 5 V /3 3V 1:2 D IF F E R E N T ,A L FANOUT BUFFER SEMICONDUCTOR FEATURES DESCRIPTION • 3.3V and 5V power supply options The SY10/1OOEL11/L are 1:2 differential fanout gates. These devices are functionally similar to the E111A/L

Contextual Info: * 1:9 TTL CLOCK DRIVER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • Low skew typically 0.65ns within device The SY10H645 is a single supply, low skew, TTL I/O 1:9 Clock Driver. Devices in the H600 clock driver family utilize the 28-lead PLCC for optimal power and signal pin

Contextual Info: PRELIM INARY TTL BICMOS STATIC RAM S Y N E R G Y SEMICONDUCTOR 64 K 1 6 K X 4 -B IT 1 ' DESCRIPTIO N FEA TU RES • ■ ■ ■ ■ Address access time, u a : 7/10/12ns max. Chip select access time, tACs: 4/6/7ns max. Popular 16K x 4 with common I/O organization

uPD70F3175

Abstract: 16845 uPD70F3175A-32 uPD703175 uPD703176 V850E LQFP100 TIG15 TIG12 NEC-V850
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD70 F 3175 V850E/CA4TM HELIOS 32- bit RISC Microcontroller DESCRIPTION The V850E/CA4 Helios microcontroller is a member of NEC's V850 32-bit RISC family, which match the performance gains attainable with RISC-based controllers to the needs of embedded control

uPD70F3175

Abstract: IR 412H 446H b 2045 RENESAS R2R CSI00 uPD703174 uPD703175 uPD703176 32MHz quartz RESONATOR
Contextual Info: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid

SD013

Abstract: SY10H843ZC
Contextual Info: SINGLE SUPPLY PECL-TTL 1:4 CLOCK DRIVER Clockworks PRELIMINARY SY10/100H843 DESCRIPTION FEATURES Translates positive ECL to TTL PECL-TTL 300ps pin-to-pin skew Guaranteed skew spec Differential internal design for increased noise immunity and stable threshold inputs

SY10EL11ZC

Contextual Info: This Material C o p y r i g h t e d B y Its R e s p e c t i v e M a n u f a c t u r e r ClockWoiks PRELIMINARY SY10/100EL11 SEMICONDUCTOR AC ELECTRICAL CHARACTERISTICS V ee = V ee M in. to V ee (M ax.); VCC = G N D +85°C +25°C 0°C _40°C Parameter

R1NP2

Contextual Info: * QUADOC-3SONETSDHATM SYNERGY CLOCKRECOVERINGTRANSCEIVER SEMICONDUCTOR FEA T U R E S inform^ ™ INF°Ty^9743 DESC RIPT IO N • A complete single-chip 4 Channel Transmitter & Receiver ■ Complies with Bellcore, CCITT and ANSI Specifications ■ Compatible with VTIVNS67200 Quad UNI Processor

128X14

Contextual Info: T D G l B ß l Q Q G 0 Q 4 Q 7bE S7E » SYNERGY SEMICONDUCTOR • Extremely fast access times: tcHCH = 5/6/7ns max. ■ Extended supply voltage option: The SY101492 is an extremely high-performance 2K x 9 SRAM. It is the first of a family of similar 9-bit wide SRAMs

SY69952

Contextual Info: * OC-3/STS-3 CLOCK RECOVERING TRANSCEIVER SYNERGY SEMICONDUCTOR FEATURES INF° RSYM952 DESCRIPTION • SONET/SDH and ATM Compatible ■ Seamless operation with PMC-Sierra PM5345 SUNI, VTIVNS67200 Quad UNI Processor, IgT WAC-013-B ATM UNI Processor and NEC |iPD98402

Contextual Info: ÇN 8-INPUT PECL DIFFERENTIAL MUX WITH TTL SELECTS SYNERGY „ SY100S863 SEMICONDUCTOR DESCRIPTION FEATURES • Low skew ■ Differential PECL inputs ■ Differential cut-off PECL outputs capable of driving 2 5 ii load for driving data bus ■ Tri-state TTL output

Contextual Info: * 2-BIT 8:1 MULTIPLEXER SYNERGY SEMICONDUCTOR FEATURES SY10E163 SY100E163 DESCRIPTION • 850ps max. propagation delay The SY10E163 and SY100E163 offertwo8:1 multiplexers designed for use in new, high-performance ECL systems. The E163 has differential outputs and common select inputs.

HP70004A

Abstract: HP53132A OV 5642 70874B
Contextual Info: * SONET/SDH/ATM OC-3 CLOCK RECOVERING TRANSCEIVER SYNERGY SEM IC O N D UC TO R FEATURES DESCRIPTION • A complete SONET/SDH Transmitter & Receiver ■ Complies with Bellcore, CCITT and ANSI Specifications ■ Two on-chip PLLs: One for clock generation & another for clock recovery

Contextual Info: * 1:9 DIFFERENTIAL CLOCK DRIVER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • Low skew The S Y 10E 111 and S Y 1 00E 11 1 are low skew 1-to-9 differential drivers designed for clock distribution in new, high-perform ance E C L systems. They accept one differential

Contextual Info: * QUAD MULTIPLEXER/ LATCH SYNERGY SEMICONDUCTOR FEATURES SY100S355 DESCRIPTION • Max. propagation delay of 1100ps ■ Max. enable to output delay of I400ps ■ I ee min. of -80m A ■ ESD protection of 2000V ■ Industry standard 100K ECL levels ■ Extended supply voltage option:

Contextual Info: « Quad driver SYNERGY syioos313 SEMICONDUCTOR FEATU R ES DESCRIPTION • Max. propagation delay of 800ps ■ Enable to Output max. of 950ps ■ I e e min. of -60mA ■ ESD protection of 2000V ■ Extended supply voltage option: The SY100S313 offers four drivers with two OR and two

SY100ELT22

Abstract: 100ELT22 ELT22 SY10ELT22 100EL22 10el2
Contextual Info: « DUAL TTL-to-DIFFERENTIAL PECL TRANSLATOR SYNERGY S E M IC O N D U C T O R F EA TU R E S D ES C R IPTIO N 300ps typical propagation delay <100ps typical output-to-output skew Differential PECL outputs The SY10/100ELT22 are dual TTL-to-differential PECL translators. Because PECL Positive ECL levels are

uPD70F3175

Abstract: PHCM PMC45 IFC021 U16241EE1V1UM00
Contextual Info: Preliminary User’s Manual V850E/CA4TM HELIOS 32-bit RISC Microcontroller Hardware µPD703174, µPD70F3175, µPD703175, µPD703176 Document No. U16241EE1V1UM00 Date Published January 2005  NEC Corporation 2005 Printed in Germany NOTES FOR CMOS DEVICES

SY2BP

Abstract: SY2BP00
Contextual Info: *SYNERGY UNIVERSAL SYSTEM ELEMENT USE SEMICONDUCTOR FEATURES SY2BP00 DESCRIPTION Highest density logic via unique 6-transistor cell: + greatest functionality per unit area + shortest propagation delays 2,184 core cells yield up to 3,640 routeable (equivalent) gates or 242 0-type flip-flops

Contextual Info: * SY10422-3/4/5/7 SY100422-3/4/517 SY101422-3/4/5/7 SY101M422-5/7 256 x 4 ECL RAM SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES The Synergy S Y10/100/101422 are 1024-bit Random Access Memories RAMs , designed with advanced Emitter Coupled Logic (ECL) circuitry. The devices are organized

Contextual Info: « LOW-POWER OCTAL ECL/TTL BI-DIRECTIONAL TRANSLATOR C V M C D ^V SYNERGY SEMICONDUCTOR PRELIMINARY syioos329 W |T H R E g i s T E R FEATURES DESCRIPTION • Bi-directional translation ■ ESD protection of 2000V ■ ECL high impedance outputs ■ Registered outputs

Contextual Info: « SYNERGY 6 - B IT 2 : 1 M U X -L A T C H SY10E155 SY100E155 SEMICONDUCTOR FEATURES DESCRIPTION 750ps max. LEN to output Extended 100E V ee range of -4.2V to -5.5V 700ps max. D to output Single-ended outputs Asynchronous Master Reset I Dual latch-enables