700PS Search Results

Contextual Info: FAST CMOS BUFFER/CLOCK DRIVER IDT54/74FCT81OBT/CT Integrated Device Technology, Inc. FEATURES: • • 0.5 MICRON CM OS technology • Guaranteed low skew < 600ps max. packages Military product compliant to MIL-STD-883, Class B DESCRIPTION: • Very low duty cycle distortion < 700ps (max.)

F100K

Abstract: SY100S321 SY100S321FC SY100S321JC SY100S321JCTR
Contextual Info: LOW-POWER 9-BIT INVERTER FEATURES SY100S321 DESCRIPTION • Max. propagation delay of 700ps ■ IEE min. of –55mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity ■ 70% faster than Fairchild 300K at lower power

Contextual Info: * 5-BIT 2:1 MUX-LATCH SYNERGY SY10E154 SY100E154 SEMICONDUCTOR FEATURES DESCRIPTION • ■ ■ ■ ■ ■ ■ 750ps max. LEN to output 700ps max. D to output Differential outputs Asynchronous Master Reset Dual latch-enables ESD protection of 2000V Fully compatible with industry standard 10KH,

Contextual Info: * SYNERG Y SY10E155 SY100E155 6-BIT2:1 MUX-LATCH SEMICONDUCTOR FEATURES 750ps max. LEN to output Extended 100E V ee range of -4.2V to -5.5V 700ps max. D to output Single-ended outputs Asynchronous Master Reset Dual latch-enables Fully compatible with industry standard 10KH,

Contextual Info: * LOW-POWER 9-BIT INVERTER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 700ps Ie e SY100S321 The SY100S321 is a monolithic 9-bit inverter. The device contains nine inverting buffer gates with single input and output. min. of -55m A

Contextual Info: • Extended 100E V ee range of -4.2V to -5.5V ■ 700ps max. D to output ■ Differential outputs ■ Asynchronous Master Reset ■ Dual latch-enables ■ Fully compatible with industry standard 10KH, 100K ECL levels ■ Internal 75Ki2 input pulldown resistors

Contextual Info: • < S Y N ER G Y TRIPLE DIFFERENTIAL Vr l û t « / ? 1 MULTIPLEXER v m O E -1 5 7 S E M IC O N D U C T O R DESCRIPTION FEATURES ■ Differential D and Q ■ Extended 100E V ee range of -4.2V to -5.5V ■ VBB output for single-ended use ■ 700ps max. propagation delay

Contextual Info: * Q U IN T 2 IN P L P SYNERGY 00S302 O R 'N O R G A T E S E M IC O N D U C T O R FEATURES DESCRIPTION • Max. propagation delay of 700ps ■ Ie e tnin. of -45m A ■ Industry standard 100K ECL levels ■ Extended supply voltage option: Vee = -4.2V to -5.5V

Contextual Info: IDT49FCT805/A FAST CMOS BUFFER/CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE FAST CMOS BUFFER CLOCK/DRIVER DESCRIPTION: FEATURES: − − − − − − − − − − − IDT49FCT805/A 0.5 MICRON CMOS Technology Guaranteed low skew < 700ps max. Low duty cycle distortion < 1ns (max.)

Contextual Info: * SY10E150 SY100E150 6-BIT D LATCH SYNERGY SEMICONDUCTOR FEATURES • ■ 700ps max. propagation delay DESCRIPTION The SY10/100E150 are 6-bit D latches with differential outputs designed for use in new, high- perform ance ECL system s. W hen both Latch Enables L E N i, LEN 2 are at a

Contextual Info: * FEATURES DESCRIPTION Max. propagation delay of 700ps Ie e SY100S322 9-BIT BUFFER SYNERGY SEMICONDUCTOR The SY100S322 is an ultra-fast buffer designed for use in high-perform ance ECL system s. The device provides nine non-inverting buffers with single-ended outputs. The

Contextual Info: * 9-BIT BUFFER SYNERGY SY100S322 SEMICONDUCTOR DESCRIPTION FEATURES Max. propagation delay of 700ps Iee The SY100S322 is an ultra-fast buffer designed for use in high-perform ance ECL system s. The device provides nine non-inverting buffers w ith single-ended outputs. The

SY100E457

Abstract: SY100E457JC SY10E457 SY10E457JC SY10E457JCTR
Contextual Info: * TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER SYNERGY S E M IC O N D U C T O R SY10E457 SY100E457 DESCRIPTION FEATURES • Differential D and Q ■ Extended 100E V ee range of -4.2V to -5.5V ■ V bb output for single-ended use ■ 700ps max. propagation delay ■ High frequency outputs

SY100E150

Abstract: SY10E150 SY10E150JC SY10E150JCTR doom
Contextual Info: * SYNERGY 6-BIT D LATCH S E M IC O N D U C T O R FEATURES SY10E150 SY100E150 DESCRIPTION • 700ps max. propagation delay The SY10/100E150 are 6-bit D latches with differential outputs designed for use in new, high- performance ECL systems. When both Latch Enables LE N i, LEN 2 are at a

Contextual Info: SY10E154 SY100E154 SY10E154 5-BIT 2:1 MUX-LATCH Micrel, Inc. FEATURES SY100E154 DESCRIPTION • ■ ■ ■ ■ ■ ■ 750ps max. LEN to output Extended 100E VEE range of –4.2V to –5.5V 700ps max. D to output Differential outputs Asynchronous Master Reset

PL102-10TC-R

Abstract: PL102-10SC-R
Contextual Info: Low Skew Output Buffer FEATURES PIN CONFIGURATION • Frequency Range: − 15 to 170MHz @ 3.3V − 15 to 145MHz @ 2.5V  Internal Phase Locked Loop Allows Spread Spectrum Modulation on Reference Clock to Pass to Outputs.  Zero Input to Output Delay  Less Than 700ps Device to Device Skew

Contextual Info: * SY10E150 SY100E150 6-BIT D LATCH SYNERGY SEMICONDUCTOR FEATURES • ■ 700ps max. propagation delay DESCRIPTION The SY10/100E150 are 6-bit D latches with differential outputs designed fo r use in new, high- perform ance ECL system s. W hen both Latch Enables LE N 1, LEN 2 are at a

Contextual Info: * SYNERGY SY10E155 SY100E155 6-BIT2:1 MUX-LATCH SEMICONDUCTOR FEATURES • 750ps max. LEN to output ■ Extended 100E V ee range of -4.2V to -5.5V ■ 700ps max. D to output ■ Single-ended outputs ■ Asynchronous Master Reset ■ Dual latch-enables ■ Fully compatible with industry standard 10KH,

Contextual Info: * SYNERGY SEMICONDUCTOR QUINT 2-INPUT OR/NOR GATE DESCRIPTION FEATURES Max. propagation delay of 700ps Ie e SY100S302 The SY100S302 offers five 2-input O R/NO R gates designed for use in high-perform ance ECL system s. The five gates are controlled by a com m on Enable signal. All

Contextual Info: * LOW-POWER 9-BIT INVERTER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 700ps Ie e SY100S321 T he S Y 100S 321 is a m o n o lith ic 9 -b it in ve rte r. T he d e vice c o n ta in s nine in v e rtin g b u ffe r g a te s w ith s in g le in p u t and

Contextual Info: * SYNERG Y SY10E155 SY100E155 6-BIT2:1 MUX-LATCH SEMICONDUCTOR FEATURES 750ps max. LEN to output Extended 100E V ee range of -4.2V to -5.5V 700ps max. D to output Single-ended outputs Asynchronous Master Reset Dual latch-enables Fully compatible with industry standard 10KH,

F100K

Abstract: SY100S321 SY100S321FC SY100S321FCTR SY100S321JC
Contextual Info: LOW-POWER 9-BIT INVERTER Micrel, Inc. FEATURES DESCRIPTION • Max. propagation delay of 700ps ■ IEE min. of –55mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity ■ 70% faster than Fairchild 300K at lower power

pd2a

Contextual Info: FAST CMOS BUFFER/CLOCK DRIVER IDT74FCT810BT/CT Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • • • • • • 0.5 MICRON CMOS technology Guaranteed low skew < 600ps max. Very low duty cycle distortion < 700ps (max.) Low CMOS power levels

Contextual Info: « SYNERGY TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER SY10E457 SY100E457 SEMICONDUCTOR DESCRIPTION FEATURES Differential D and Q Extended 100E Vee range of -4.2V to -5.5V VBB output for single-ended use 700ps max. propagation delay High frequency outputs Separate and common select