SUPERNET Search Results

SUPERNET

Contextual Info: P R E L IM IN A R Y Advanced Micro Devices Am79C850 SUPERNET 3 DISTINCTIVE CHARACTERISTICS • Compliant with the ANSI X3T9.5/ISO 9314 specification ■ ANSI-com pliant TP-PM D Stream Cipher Scram bling/Descram bling — 100 Mbps data rate ■ Full duplex operation: 200 Mbps continuous

SUPERNET

Abstract: Base Station Drivers AMD PLC Am79C830A 32kx8 SRAM
Contextual Info: PRELIMINARY FASTcardTM 2 FDDI PC/AT-Based SUPERNET 2 Technology Card FASTcard Dual Attachment Concentrator Board Set and Software Package Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • IBM PC-AT or compatible plug-in board to implement an FDDI station

Contextual Info: a PRELIMINARY FASTcard 2 FDDI PC/AT-Based SUPERNET 2 Technology Card FASTcard Dual Attachment Concentrator Board Set and Software Package Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • IBM PC-AT or compatible plug-ln board to Implement an FDDI station

PQR168

Abstract: Am79C830A CGX169 4570 pin out diagram LG plc plc lg FDD11994 PQR120 15502C
Contextual Info: AMD a Am 79C830A FORMAC Plus CGX169 169-Lead Pin Grid Array Without H eat Sink measured in inches Physical Dimensions 6-3 i l AMD Am 79C830A FORMAC Plus PQR168 168-Pin Plastic Quad FlatPack (Trimmed and Formed) (measured in inches) TOP VIEW 6-4 The SUPERNET 2 Family for FDD11994 Data Book

PCM sbec

Abstract: SUPERNET 2 Family Am79C830A TS5430 SUPERNET AM79C850 BD15 PQJ208 PQR208 NP548
Contextual Info: PRELIMINARY Advanced Micro Devices Am79C850 SUPERNET 3 DISTINCTIVE CHARACTERISTICS • Compliant with the ANSI X3T9.5/ISO 9314 specification — 100 Mbps data rate — Timed token-passing protocol — Ring topology ■ Complete memory management — Supports 256K bytes of local frame buffer

D03011E

Abstract: am transmitter circuit diagram Am79h2000
Contextual Info: ADV MICRO TELECOM SÖE D 0E57S27 GD3G111 ö 7=47- 9/ Preliminary a Advanced Micro Devices Am79h2000X 1300nm Fiber Optic Transceiver DISTINCTIVE CHARACTERISTICS • Full electrical and optical FDDI compliance Differential ECL I/O ■ FDDI SUPERNET and TAXI™ compatible

FDL-1300-SA

Abstract: 2451B 1300sa ODL 125 Data FDL-1300-RX-S FDL-1300-RX-SA FDL-1300-TX-S FDL-1300-TX-SA FDL-1300-S odl 125
Contextual Info: OPTICAL conn PRODUCTS INC 5?E D Bi 245lfc.41 DDOOBbS 7T2 H P C O OCP_ - »' FDL-1300-S and FDL-1300-SA Data Link Modules for FDDI Features_ □ Full FDDI Compliance EH Integral ST™ Optical Connector □ Single Supply Voltage + 5 V o r

Am79C83

Contextual Info: Am79C83 Fiber Optic Ring Media Access Controller FORMAC Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Implements Media Access Control (MAC) layer protocol for the ANSI X3T9.5 standard (Fiber Distributed Data Interface, FDDI) ■ Error detection capability

Am79c900

Abstract: AM7990 AMD Supernet
Contextual Info: NETWORKING SYSTEM OVERVIEW which consists of a Transmitter and Receiver chip and functions as a general-purpose interface for very high-speed point-to-point communications over coaxial or fiber-optic media. These products and plans for future ones continue to show our commit­

NORTEL asn

Abstract: "Spanning Tree" "Link state Protocol" "LINK STATE"
Contextual Info: Network Design Essentials Self Assessment ANSWERS Network Standards 1. Which IEEE standard contains the Token-Ring MAC specification? a. 802.2 b. 802.3 c. 802.5 d. 802.9 2. Which standards committee is responsible for the OSPF specification? a. IEEE b. OSI

Contextual Info: a Preliminary Advanced Micro Devices Am79865/Am79866 Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • ■ ■ ■ Parallel Input to the PDT Is a 5-bit encoded NRZ symbol clocked by LSCLK Parallel output from the PDR is a 5-bit

Contextual Info: a P R E L IM IN A R Y Advanced Micro Devices Am79C830A FORMAC Plus DISTINCTIVE CHARACTERISTICS • Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 ■ Pointers to claim and beacon frames ■ Buffer-memory clock frequency range:

AM79865

Abstract: AM79866A
Contextual Info: AMD£I Am79865/Am79866A Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Fully compliant with ANSI X3T9.5 FDDI, TP-FDDI, and 100BASE-TX/FX PHY standards ■ The on-chip Phase-Locked-Loop PLL only requires an external frequency reference

DD127d

Abstract: DLR1040-ST2 DLT1040-ST2 ODL125 DLT1040-ST1 DLR1040-ST1 AMD Supernet 2 dlr1040-st ODL-125 DLT/R1040-STX
Contextual Info: W fip l H E W LE T T 1"UM PA C K A R D Fiber Optic Data Links Technical Data DLT1040-STX Transmitter DLR1040-STX Receiver Features Description • FDDI PMD/ATM UNI or Fiber Channel FC-O Versions Available • Single +5 V Power Supply • Compact 16-pin DIP Package

14K14D

Abstract: dpc 050 hex Am79C82 H-14 79C83 AM79C82AGC np dpc 050 AMD Supernet AMD AM79C82A
Contextual Info: a Preliminary Advanced Micro Devices Am79C82A CMOS Data Path Controller DPC DISTINCTIVE CHARACTERISTICS • Performs reception and transmission of frames ■ Byte (8 + 1 bits) to word (32 + 4 bits) conversions ■ Reports error status ■ Performs parity check and generation

NX686

Abstract: Am29050 Am29040 AM29005 AMD AM29050
Contextual Info: AMD - Trademark Information AMD Trademarks AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. GENERAL NOTICE: The following are marks of Advanced Micro Devices, Inc. This list is not intended to be an exhaustive or comprehensive list of all AMD marks. Other product names used in this web site are for

pci600

Abstract: PT-PCI600-10716 chipset mtbf mic connector pci600 semiconductor diode PT-PCI600 RJ45 SMT Content Addressable Memory SUPERNET AMD Supernet
Contextual Info: Features -Benefits PT-PCI600 PCI FDDI Adapter ◆ Single Slot FDDI, Dual or Single Attach DAS or SAS Allowing for concentrator connectivity or backbone configurations ◆ Available with SC, MIC (Fiber) or UTP (RJ-45) connectors Flexibility to fit into existing network

W47B

Abstract: transistor m285 w41b M331 transistor M313 TRANSISTOR MCA2500ECL a6019 Tektronix k15 yg 2025 VIM-332
Contextual Info: Ordar this data shaat by MCA1500M/D MOTOROLA n S E M IC O N D U C T O R S P.O. BOX 20912 • PHO ENIX, A R IZ O N A 85036 A d v a n c e Information MOSAIC II MCA1500M MACROCELL ARRAY ECL MACROCELL ARRAY This specification defines the design and performance require­

Contextual Info: FINAL AMDZ1 Am79865/Am79866A Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Fully compliant with ANSI X3T9.5 FDDI, TP-FDDI, and 100BASE-TX/FX PHY standards ■ The on-chip Phase-Locked-Loop PLL only requires an external frequency reference

Contextual Info: FINAL AMD£I Am79865/Am79866A Physical DataTransmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Fully compliant with ANSI X3T9.5 FDDI, TP-FDDI, and 100BASE-TX/FX PHY standards ■ The on-chip Phase-Locked-Loop PLL only requires an external frequency reference

T-75-49

Abstract: AM79865 AMD Supernet 2 AM79866JC MAE 411
Contextual Info: ADV MICRO T E L E C O M MAE D □ 257527 0 0 3 0 ^ 2 □ • AMD3 Preliminary a Advanced Micro Devices Am79865/Am79866 Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS ■ ■ ■ ■ Parallel Input to the PDT Is a 5-bit encoded

lm2311

Abstract: 2N3546 PN2369 EQUIVALENT 2N3639 4N32 pinout "1N6263" AM79865 1N6263 2N2369 C6 FTP
Contextual Info: Advanced Micro Devices FDDI on Copper with AMD PHY Components by Eugen Gershon Publication # 15923 Rev. Amendment A /0 Issue Date 6/91  1991 Advanced Micro Devices, Inc. FDDI on Copper with AMD PHY Components by Eugen Gershon and pin-out compatible with the MIC device found on

NP920

Abstract: SUPERNET 2 Family pcms AM79C864A NP10 AMD Supernet am79864a AMD Supernet 2 NP5-12 NP1223
Contextual Info: PRELIMINARY Am79C864A Physical Layer Controller With Scrambler PLC-S Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Implements FDDI PHY layer protocol for ISO standard (FDDI) 9314-1 ■ Line state detection ■ Implements ANSI standard Stream Cipher

AM79865

Abstract: AM79866A AM79866AJC
Contextual Info: FINAL Am79865/Am79866A Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Fully compliant with ANSI X3T9.5 FDDI, TP-FDDI, and 100BASE-TX/FX PHY standards ■ The on-chip Phase-Locked-Loop PLL only requires an external frequency reference