AM79865 Search Results

Contextual Info: a Preliminary Advanced Micro Devices Am79865/Am79866 Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • ■ ■ ■ Parallel Input to the PDT Is a 5-bit encoded NRZ symbol clocked by LSCLK Parallel output from the PDR is a 5-bit

AM79865

Abstract: AM79866A
Contextual Info: AMD£I Am79865/Am79866A Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Fully compliant with ANSI X3T9.5 FDDI, TP-FDDI, and 100BASE-TX/FX PHY standards ■ The on-chip Phase-Locked-Loop PLL only requires an external frequency reference

Contextual Info: FINAL AMDZ1 Am79865/Am79866A Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Fully compliant with ANSI X3T9.5 FDDI, TP-FDDI, and 100BASE-TX/FX PHY standards ■ The on-chip Phase-Locked-Loop PLL only requires an external frequency reference

Contextual Info: FINAL AMD£I Am79865/Am79866A Physical DataTransmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Fully compliant with ANSI X3T9.5 FDDI, TP-FDDI, and 100BASE-TX/FX PHY standards ■ The on-chip Phase-Locked-Loop PLL only requires an external frequency reference

T-75-49

Abstract: AM79865 AMD Supernet 2 AM79866JC MAE 411
Contextual Info: ADV MICRO T E L E C O M MAE D □ 257527 0 0 3 0 ^ 2 □ • AMD3 Preliminary a Advanced Micro Devices Am79865/Am79866 Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS ■ ■ ■ ■ Parallel Input to the PDT Is a 5-bit encoded

Photo sensitive diode

Abstract: AM79865 16356A AM79866
Contextual Info: Board Layout Considerations for Am79865 and Am79866 Advanced Micro Devices Application Note by Michael Bray The Physical Data Transmitter PDT and Physical Data Receiver (PDR) contain high frequency analog Phase Lock Loops (PLLs). Reliable operation in a high frequency analog and digital environment requires that

AM79865

Abstract: AM79866A AM79866AJC
Contextual Info: FINAL Am79865/Am79866A Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Fully compliant with ANSI X3T9.5 FDDI, TP-FDDI, and 100BASE-TX/FX PHY standards ■ The on-chip Phase-Locked-Loop PLL only requires an external frequency reference

Contextual Info: H Preliminary Advanced Micro Devices Am79865/Am79866 Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • ■ ■ ■ Parallel Input to the PDT Is a 5-bit encoded NRZ symbol clocked by LSCLK Parallel output from the PDR Is a 5-bit

5PDT

Abstract: AM79866 79866 AM79865
Contextual Info: H Preliminary Am79865/Am79866 Advanced Micro Devices Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • ■ ■ ■ Parallel Input to the PDT Is a 5-bit encoded NRZ symbol clocked by LSCLK Parallel output from the PDR Is a 5-bit

AM79865

Abstract: AM79866A
Contextual Info: A M D ii Am79865/Am79866A Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Fully compliant with ANSI X3T9.5 FDDI, TP-FDDI, and 10OBASE-TX/FX PHY standards ■ The on-chip Phase-Locked-Loop PLL only requires an external frequency reference

Contextual Info: a P R E L IM IN A R Y Advanced Micro Devices Am79865/Am79866A Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Parallel Input to the PDT is a 5-blt encoded NRZ symbol clocked by LSCLK 125 MBaud 100 Mbps serial link data rate

AM79865

Abstract: AM79866A
Contextual Info: A M D ii Am79865/Am79866A Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Fully compliant with ANSI X3T9.5 FDDI, TP-FDDI, and 10OBASE-TX/FX PHY standards ■ The on-chip Phase-Locked-Loop PLL only requires an external frequency reference

AM79C972 PCnet

Abstract: am transmitter circuit diagram 79c972 AM79C900 BCR40 93C46 AM79C972 PC97 PQR160 am79c874
Contextual Info: Am79C972 PCnet -FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support DISTINCTIVE CHARACTERISTICS n Integrated Fast Ethernet controller for the Peripheral Component Interconnect PCI bus n Supports PC97, PC98, and Net PC requirements — 32-bit glueless PCI host interface

Contextual Info: PRELIMINARY AMD£I Am79C971 PCnet -fi4Sr Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus DISTINCTIVE CHARACTERISTICS • Single-chip Fast Ethernet controller for the Peripheral Component Interconnect PCI local bus — 32-bit glueless PCI host interface

Contextual Info: PRELIMINARY AM D il Am79C971 PCnet -fi4ST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus DISTINCTIVE CHARACTERISTICS — Includes intelligent on-chip Network Port Managerthat provides auto-port selection between Mil, on-chip 10BASE-T port, and AUI without soft­

MLT 22 452

Abstract: PECL ABB 10BASE PLCC28 PE-95000 PE-68517L FEEDBACK EQUALIZER ERROR DE-SCRAMBLE TTL catalog H303
Contextual Info: FASTPULSE MediaCAT HIGH SPEED LAN TRANSCEIVERS Twisted pair transceiver kit for TP-FDDI, 100BaseTX and ATM 155 Mbps Matched integrated circuit and magnetic module Flexible, cost-effective frontend solution General Description FASTPULSE MediaCAT Chip And Transformer is a transceiver

TCFR10

Abstract: 44-PIN MC68836 ML6673 ML6691 MDIO MDC
Contextual Info: March 1997 ML6691* 100BASE-T MII-to-PMD Transceiver GENERAL DESCRIPTION FEATURES The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 100BASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/ decoder, a Stream Cipher scrambler/descrambler, and

AM79C971A

Abstract: AM7992
Contextual Info: Am79C971 PCnet -FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus DISTINCTIVE CHARACTERISTICS • Single-chip Fast Ethernet controller for the Peripheral Component Interconnect PCI local bus — 32-bit glueless PCI host interface

am79c972a

Contextual Info: PRELIMINARY AMDZ1 Am79C972 PCnet -fi4Sr+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support DISTINCTIVE CHARACTERISTICS • Integrated Fast Ethernet controller for the Peripheral Component Interconnect PCI bus — 32-bit glueless PCI host interface

AMD 79c97* lance

Contextual Info: PRELIMINARY AMDH Am79C971 PCnet -fi4ST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus DISTINCTIVE CHARACTERISTICS • Single-chip Fast Ethernet controller for the Peripheral Component Interconnect PCI local bus — 32-bit glueless PCI host interface

100BASE-FX

Abstract: SDI descrambler mlt 22925 MDIO MDC
Contextual Info: Designing 10/100 Mbps Ethernet Switches with the NetPHY -4LP Device Am79C875 Application Note Designing 10/100 Mbps Ethernet Switches with the NetPHY-4LP Device (Am79C875) Application Note by Robert Hartman This application note provides a design reference for customers implementing mixed 10BASE-T/

lm2311

Abstract: 2N3546 PN2369 EQUIVALENT 2N3639 4N32 pinout "1N6263" AM79865 1N6263 2N2369 C6 FTP
Contextual Info: Advanced Micro Devices FDDI on Copper with AMD PHY Components by Eugen Gershon Publication # 15923 Rev. Amendment A /0 Issue Date 6/91  1991 Advanced Micro Devices, Inc. FDDI on Copper with AMD PHY Components by Eugen Gershon and pin-out compatible with the MIC device found on

tms 1943

Abstract: transistor BD 222 SMD laf 0001 s3 via Twister mdc 1200 Encoder/Decoder HY 400 RJ45 PCI jack valor ST7032 ap 1410 datasheet transistor smd bh
Contextual Info: PRELIMINARY Am79C971 PCnet -FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus DISTINCTIVE CHARACTERISTICS • Single-chip Fast Ethernet controller for the Peripheral Component Interconnect PCI local bus — 32-bit glueless PCI host interface

Contextual Info: June 1995 PRELIMINARY ^ÉkMicro Linear ML6691 100BASE-T MIl-to-PMD Transceiver GENERAL DESCRIPTION FEATURES The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 10OBASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/